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authorXi Pardee <xi.pardee@intel.com>2022-11-14 10:32:51 -0800
committerHans de Goede <hdegoede@redhat.com>2022-11-21 10:42:35 +0100
commit03c58a1e949d16faa922dd0501db1f2585d66eb3 (patch)
tree9f76a79142fd6425377534350ebe69d83c275bac /drivers/platform/x86/intel
parent284c01b72ac9cad03b972324a72782759ef980af (diff)
downloadlinux-03c58a1e949d16faa922dd0501db1f2585d66eb3.tar.bz2
platform/x86: intel/pmc: Move variable declarations and definitions to header and core.c
Move the msr_map variable declaration to core.h and move the pmc_lpm_modes definition to core.c. This is a prepartory patch for redesigning the pmc core driver as the variables will be used in multiple PCH specific files. Cc: David E Box <david.e.box@linux.intel.com> Reviewed-by: "David E. Box" <david.e.box@linux.intel.com> Signed-off-by: Xi Pardee <xi.pardee@intel.com> Signed-off-by: "David E. Box" <david.e.box@linux.intel.com> Link: https://lore.kernel.org/r/20221114183257.2067662-3-gayatri.kammela@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/x86/intel')
-rw-r--r--drivers/platform/x86/intel/pmc/core.c15
-rw-r--r--drivers/platform/x86/intel/pmc/core.h13
2 files changed, 16 insertions, 12 deletions
diff --git a/drivers/platform/x86/intel/pmc/core.c b/drivers/platform/x86/intel/pmc/core.c
index b434cf5b094b..cfa654672cba 100644
--- a/drivers/platform/x86/intel/pmc/core.c
+++ b/drivers/platform/x86/intel/pmc/core.c
@@ -35,8 +35,21 @@
#define ACPI_S0IX_DSM_UUID "57a6512e-3979-4e9d-9708-ff13b2508972"
#define ACPI_GET_LOW_MODE_REGISTERS 1
+/* Maximum number of modes supported by platfoms that has low power mode capability */
+const char *pmc_lpm_modes[] = {
+ "S0i2.0",
+ "S0i2.1",
+ "S0i2.2",
+ "S0i3.0",
+ "S0i3.1",
+ "S0i3.2",
+ "S0i3.3",
+ "S0i3.4",
+ NULL
+};
+
/* PKGC MSRs are common across Intel Core SoCs */
-static const struct pmc_bit_map msr_map[] = {
+const struct pmc_bit_map msr_map[] = {
{"Package C2", MSR_PKG_C2_RESIDENCY},
{"Package C3", MSR_PKG_C3_RESIDENCY},
{"Package C6", MSR_PKG_C6_RESIDENCY},
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h
index e64b33e46397..b4279ed59bbe 100644
--- a/drivers/platform/x86/intel/pmc/core.h
+++ b/drivers/platform/x86/intel/pmc/core.h
@@ -237,17 +237,7 @@ enum ppfear_regs {
#define ADL_LPM_STATUS_LATCH_EN_OFFSET 0x1704
#define ADL_LPM_LIVE_STATUS_OFFSET 0x1764
-static const char *pmc_lpm_modes[] = {
- "S0i2.0",
- "S0i2.1",
- "S0i2.2",
- "S0i3.0",
- "S0i3.1",
- "S0i3.2",
- "S0i3.3",
- "S0i3.4",
- NULL
-};
+extern const char *pmc_lpm_modes[];
struct pmc_bit_map {
const char *name;
@@ -346,6 +336,7 @@ struct pmc_dev {
void (*core_configure)(struct pmc_dev *pmcdev);
};
+extern const struct pmc_bit_map msr_map[];
void spt_core_init(struct pmc_dev *pmcdev);
void cnp_core_init(struct pmc_dev *pmcdev);
void icl_core_init(struct pmc_dev *pmcdev);