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author | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-19 14:19:33 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2019-09-19 14:19:33 -0700 |
commit | 3c2edc36a77420d8be05d656019dbc8c31535992 (patch) | |
tree | 70d8c9abb04c89e82c79c46efd2f7cb1bf836ef5 /drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | |
parent | 32b90daf5cafdda62b1ce62d0b7445fa9107babf (diff) | |
parent | cb0438e4436085d89706b5ccfce4d5da531253de (diff) | |
download | linux-3c2edc36a77420d8be05d656019dbc8c31535992.tar.bz2 |
Merge tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.4 kernel cycle:
Core changes:
- Fix errors in example code in the documentation.
New drivers:
- Add support for JZ4760, JZ4760B, X1000, X1000E and X1500 to the
Ingenic driver.
- Support Cirrus Logic Madera CS47L92 and CS47L15.
- Support Allwinner Sunxi V3S.
- Support Aspeed 2600 BMC.
- Support Qualcomm SC7180.
- Support Marvell MVEBU CS115.
Driver improvements:
- Clean up a few drivers to use the devm_platform_ioremap_resource()
helper.
- Pass the irqchip when registering the gpio_chip in some pin
controllers that are also GPIO controllers.
- Support suspend/resume in the Tegra driver.
- Support pull-up on the Broadcom BCM2711.
- The Intel driver can now request locked pads.
- Fix the UFS reset pin in the Qualcomm SDM845 driver"
* tag 'pinctrl-v5.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (112 commits)
pinctrl: meson-gxbb: Fix wrong pinning definition for uart_c
pinctrl: sh-pfc: Unlock on error in sh_pfc_func_set_mux()
pinctrl: bcm: remove redundant assignment to pointer log
pinctrl: iproc: Add 'get_direction' support
pinctrl: iproc-gpio: Handle interrupts for multiple instances
pinctrl: iproc-gpio: Fix incorrect pinconf configurations
pinctrl: intel: mark intel_pin_to_gpio __maybe_unused
pinctrl: qcom: sdm845: Fix UFS_RESET pin
pinctrl: mvebu: add additional variant for standalone CP115
pinctrl: mvebu: Add CP110 missing pin functionality
dt-bindings: cp110: document the new CP115 pinctrl compatible
pinctrl: bcm2835: Pass irqchip when adding gpiochip
pinctrl: meson: meson: Add of_node_put() before return
pinctrl/gpio: Take MUX usage into account
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150l support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150b support
dt-bindings: pinctrl: qcom-pmic-gpio: Add pm8150 support
pinctrl: amd: disable spurious-firing GPIO IRQs
pinctrl: rza2: Include the appropriate headers
pinctrl: rza2: Drop driver use of consumer flags
...
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c')
-rw-r--r-- | drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 4a6580da4edb..4277d494a348 100644 --- a/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c @@ -807,7 +807,9 @@ static const unsigned nand_pins[] = {19, 20, 21, 22, 23, 24, 25, 28, 29, 30, static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned nand_cs1_pins[] = {26, 27}; static const int nand_cs1_muxvals[] = {0, 0}; -static const unsigned sd_pins[] = {250, 251, 252, 253, 254, 255, 256, 257, 258}; +static const unsigned pcie_pins[] = {109, 110, 111}; +static const int pcie_muxvals[] = {0, 0, 0}; +static const unsigned sd_pins[] = {247, 248, 249, 250, 251, 252, 253, 254, 255}; static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0}; static const unsigned spi0_pins[] = {120, 121, 122, 123}; static const int spi0_muxvals[] = {0, 0, 0, 0}; @@ -839,8 +841,10 @@ static const unsigned uart0_pins[] = {47, 48}; static const int uart0_muxvals[] = {0, 0}; static const unsigned uart0b_pins[] = {227, 228}; static const int uart0b_muxvals[] = {3, 3}; -static const unsigned uart0b_ctsrts_pins[] = {229, 230, 231, 232, 233, 234}; -static const int uart0b_ctsrts_muxvals[] = {3, 3, 3, 3, 3, 3}; +static const unsigned uart0b_ctsrts_pins[] = {232, 233}; +static const int uart0b_ctsrts_muxvals[] = {3, 3}; +static const unsigned uart0b_modem_pins[] = {229, 230, 231, 234}; +static const int uart0b_modem_muxvals[] = {3, 3, 3, 3}; static const unsigned uart1_pins[] = {49, 50}; static const int uart1_muxvals[] = {0, 0}; static const unsigned uart2_pins[] = {51, 52}; @@ -900,6 +904,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(i2c5b), UNIPHIER_PINCTRL_GROUP(i2c5c), UNIPHIER_PINCTRL_GROUP(i2c6), + UNIPHIER_PINCTRL_GROUP(pcie), UNIPHIER_PINCTRL_GROUP(sd), UNIPHIER_PINCTRL_GROUP(spi0), UNIPHIER_PINCTRL_GROUP(spi1), @@ -916,6 +921,7 @@ static const struct uniphier_pinctrl_group uniphier_pro5_groups[] = { UNIPHIER_PINCTRL_GROUP(uart0), UNIPHIER_PINCTRL_GROUP(uart0b), UNIPHIER_PINCTRL_GROUP(uart0b_ctsrts), + UNIPHIER_PINCTRL_GROUP(uart0b_modem), UNIPHIER_PINCTRL_GROUP(uart1), UNIPHIER_PINCTRL_GROUP(uart2), UNIPHIER_PINCTRL_GROUP(uart3), @@ -933,6 +939,7 @@ static const char * const i2c3_groups[] = {"i2c3"}; static const char * const i2c5_groups[] = {"i2c5", "i2c5b", "i2c5c"}; static const char * const i2c6_groups[] = {"i2c6"}; static const char * const nand_groups[] = {"nand", "nand_cs1"}; +static const char * const pcie_groups[] = {"pcie"}; static const char * const sd_groups[] = {"sd"}; static const char * const spi0_groups[] = {"spi0"}; static const char * const spi1_groups[] = {"spi1"}; @@ -946,7 +953,8 @@ static const char * const system_bus_groups[] = {"system_bus", "system_bus_cs5", "system_bus_cs6", "system_bus_cs7"}; -static const char * const uart0_groups[] = {"uart0", "uart0b", "uart0b_ctsrts"}; +static const char * const uart0_groups[] = {"uart0", "uart0b", + "uart0b_ctsrts", "uart0b_modem"}; static const char * const uart1_groups[] = {"uart1"}; static const char * const uart2_groups[] = {"uart2"}; static const char * const uart3_groups[] = {"uart3"}; @@ -963,6 +971,7 @@ static const struct uniphier_pinmux_function uniphier_pro5_functions[] = { UNIPHIER_PINMUX_FUNCTION(i2c5), UNIPHIER_PINMUX_FUNCTION(i2c6), UNIPHIER_PINMUX_FUNCTION(nand), + UNIPHIER_PINMUX_FUNCTION(pcie), UNIPHIER_PINMUX_FUNCTION(sd), UNIPHIER_PINMUX_FUNCTION(spi0), UNIPHIER_PINMUX_FUNCTION(spi1), |