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| author | Icenowy Zheng <icenowy@aosc.io> | 2017-08-01 22:54:16 +0800 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-08-14 15:01:03 +0200 |
| commit | f547b3de907d45683fc4ff15315e11cb0a3df32d (patch) | |
| tree | 1544e14c210e6acd148f5102a1233d98380799c1 /drivers/pinctrl/uniphier/pinctrl-uniphier-core.c | |
| parent | 3f713b7c223ebe5094973ce6e0272bd97363b552 (diff) | |
| download | linux-f547b3de907d45683fc4ff15315e11cb0a3df32d.tar.bz2 | |
pinctrl: sunxi: fix V3s pinctrl driver IRQ bank base
The V3s pin controller doesn't have the bank 0 (starts at address
0x200), which is like A33. However, this is not worked around when
developing the driver, which makes IRQ not working.
Fix the IRQ bank base.
Fixes: 56d9e4a76039 ("pinctrl: sunxi: add driver for V3s SoC")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/uniphier/pinctrl-uniphier-core.c')
0 files changed, 0 insertions, 0 deletions