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authorChen-Yu Tsai <wens@csie.org>2019-01-13 17:57:23 +0800
committerLinus Walleij <linus.walleij@linaro.org>2019-01-14 16:12:59 +0100
commitca4438442ef263cbaa3ae62a712143132cf508c1 (patch)
tree13ce510bf3fd2cfe2d5d9c154f54de59a4f98f19 /drivers/pinctrl/sunxi/pinctrl-sunxi.h
parentdc14455841773df52b15a17b36d01a26745f212b (diff)
downloadlinux-ca4438442ef263cbaa3ae62a712143132cf508c1.tar.bz2
pinctrl: sunxi: Consider pin_base when calculating regulator array index
On most newer Allwinner SoCs, there are two pinctrl devices, the PIO and R_PIO. PIO covers pin-banks PA to PI (PJ and PK have not been seen), while R_PIO covers PL to PN. The regulator array only has space for 12 entries, which was designed to cover PA to PL. On the A80, the pin banks go up to PN, which would be the 14th entry in the regulator array. However since the driver only needs to track regulators for its own pin banks, the array only needs to have 9 entries, and also take in to account the value of pin_base, such that the regulator for the first pin-bank of the pinctrl device, be it "PA" or "PL" uses the first entry of the array. Base the regulator array index on pin_base, such that "PA" for PIO and "PL" for R_PIO both take the first element within their respective device's regulator array. Also decrease the size of the regulator array to 9, just enough to cover "PA" to "PI". Fixes: 9a2a566adb00 ("pinctrl: sunxi: Deal with per-bank regulators") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sunxi/pinctrl-sunxi.h')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index e340d2a24b44..034c0317c8d6 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -136,7 +136,7 @@ struct sunxi_pinctrl {
struct gpio_chip *chip;
const struct sunxi_pinctrl_desc *desc;
struct device *dev;
- struct sunxi_pinctrl_regulator regulators[12];
+ struct sunxi_pinctrl_regulator regulators[9];
struct irq_domain *domain;
struct sunxi_pinctrl_function *functions;
unsigned nfunctions;