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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-24 10:10:22 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2022-06-28 15:55:20 +0200 |
commit | 3eb12bced6ab4f79af2540107c5d54d9ab392883 (patch) | |
tree | d009233a22085e6a3ffbfe2c8bdb9e05d8ba8726 /drivers/pinctrl/samsung/pinctrl-exynos.c | |
parent | d1e7bb90f0d453943d49db2f671e9d61c7d13466 (diff) | |
download | linux-3eb12bced6ab4f79af2540107c5d54d9ab392883.tar.bz2 |
pinctrl: samsung: do not use bindings header with constants
The Samsung SoC pin controller driver uses only three defines from the
bindings header with pin configuration register values, which proves
the point that this header is not a proper bindings-type abstraction
layer with IDs.
Define the needed register values directly in the driver and stop using
the bindings header.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-8-krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20220624081022.32384-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/samsung/pinctrl-exynos.c')
-rw-r--r-- | drivers/pinctrl/samsung/pinctrl-exynos.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c index 6d7ca1758292..a8212fc126bf 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -27,8 +27,6 @@ #include <linux/soc/samsung/exynos-pmu.h> #include <linux/soc/samsung/exynos-regs-pmu.h> -#include <dt-bindings/pinctrl/samsung.h> - #include "pinctrl-samsung.h" #include "pinctrl-exynos.h" @@ -173,7 +171,7 @@ static int exynos_irq_request_resources(struct irq_data *irqd) con = readl(bank->pctl_base + reg_con); con &= ~(mask << shift); - con |= EXYNOS_PIN_FUNC_EINT << shift; + con |= EXYNOS_PIN_CON_FUNC_EINT << shift; writel(con, bank->pctl_base + reg_con); raw_spin_unlock_irqrestore(&bank->slock, flags); @@ -196,7 +194,7 @@ static void exynos_irq_release_resources(struct irq_data *irqd) con = readl(bank->pctl_base + reg_con); con &= ~(mask << shift); - con |= EXYNOS_PIN_FUNC_INPUT << shift; + con |= PIN_CON_FUNC_INPUT << shift; writel(con, bank->pctl_base + reg_con); raw_spin_unlock_irqrestore(&bank->slock, flags); |