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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-09 12:52:28 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-09 12:52:28 -0700 |
commit | 9420f1ce01869409d78901c3e036b2c437cbc6b8 (patch) | |
tree | ce371cca5922398c811f6a8072aed10343c2594d /drivers/pinctrl/pinctrl-sx150x.c | |
parent | dec1fbbc1d7c46aed9fc1d3ee1f7f4fc04d6ed51 (diff) | |
parent | 7ee193e2dda3f48b692fad46ab9df90e99e7b811 (diff) | |
download | linux-9420f1ce01869409d78901c3e036b2c437cbc6b8.tar.bz2 |
Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of the pin control changes for the v5.9 kernel
series:
Core changes:
- The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
macro" was put in an immutable branch and merged into the pinctrl
tree as well. We see these changes also here.
- Improved debug output for pins used as GPIO.
New drivers:
- Ocelot Sparx5 SoC driver.
- Intel Emmitsburg SoC subdriver.
- Intel Tiger Lake-H SoC subdriver.
- Qualcomm PM660 SoC subdriver.
- Renesas SH-PFC R8A774E1 subdriver.
Driver improvements:
- Linear improvement and cleanups of the Intel drivers for
Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
things.
- Renesas SH-PFC has added support for RPC pins, groups, and
functions to r8a77970 and r8a77980.
- The newere Freescale (now NXP) i.MX8 pin controllers have been
modularized. This is driven by the Google Android GKI initiative I
think.
- Open drain support for pins on the Qualcomm IPQ4019.
- The Ingenic driver can handle both edges IRQ detection.
- A big slew of documentation fixes all over the place.
- A few irqchip template conversions by yours truly.
* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
pinctrl: stmfx: Use irqchip template
pinctrl: amd: Use irqchip template
pinctrl: mediatek: fix build for tristate changes
pinctrl: samsung: Use bank name as irqchip name
pinctrl: core: print gpio in pins debugfs file
pinctrl: mediatek: add mt6779 eint support
pinctrl: mediatek: add pinctrl support for MT6779 SoC
pinctrl: mediatek: avoid virtual gpio trying to set reg
pinctrl: mediatek: update pinmux definitions for mt6779
pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
pinctrl: mcp23s08: Use irqchip template
pinctrl: sx150x: Use irqchip template
dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
pinctrl: intel: Add Intel Emmitsburg pin controller support
pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
Revert "gpio: omap: handle pin config bias flags"
pinctrl: single: Use fallthrough pseudo-keyword
pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
pinctrl: baytrail: Use fallthrough pseudo-keyword
...
Diffstat (limited to 'drivers/pinctrl/pinctrl-sx150x.c')
-rw-r--r-- | drivers/pinctrl/pinctrl-sx150x.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/pinctrl/pinctrl-sx150x.c b/drivers/pinctrl/pinctrl-sx150x.c index 708bc91862fe..b325a136ac48 100644 --- a/drivers/pinctrl/pinctrl-sx150x.c +++ b/drivers/pinctrl/pinctrl-sx150x.c @@ -1187,17 +1187,10 @@ static int sx150x_probe(struct i2c_client *client, if (pctl->data->model != SX150X_789) pctl->gpio.set_multiple = sx150x_gpio_set_multiple; - ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl); - if (ret) - return ret; - - ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev), - 0, 0, pctl->data->npins); - if (ret) - return ret; - /* Add Interrupt support if an irq is specified */ if (client->irq > 0) { + struct gpio_irq_chip *girq; + pctl->irq_chip.irq_mask = sx150x_irq_mask; pctl->irq_chip.irq_unmask = sx150x_irq_unmask; pctl->irq_chip.irq_set_type = sx150x_irq_set_type; @@ -1213,8 +1206,8 @@ static int sx150x_probe(struct i2c_client *client, /* * Because sx150x_irq_threaded_fn invokes all of the - * nested interrrupt handlers via handle_nested_irq, - * any "handler" passed to gpiochip_irqchip_add() + * nested interrupt handlers via handle_nested_irq, + * any "handler" assigned to struct gpio_irq_chip * below is going to be ignored, so the choice of the * function does not matter that much. * @@ -1222,13 +1215,15 @@ static int sx150x_probe(struct i2c_client *client, * plus it will be instantly noticeable if it is ever * called (should not happen) */ - ret = gpiochip_irqchip_add_nested(&pctl->gpio, - &pctl->irq_chip, 0, - handle_bad_irq, IRQ_TYPE_NONE); - if (ret) { - dev_err(dev, "could not connect irqchip to gpiochip\n"); - return ret; - } + girq = &pctl->gpio.irq; + girq->chip = &pctl->irq_chip; + /* This will let us handle the parent IRQ in the driver */ + girq->parent_handler = NULL; + girq->num_parents = 0; + girq->parents = NULL; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_bad_irq; + girq->threaded = true; ret = devm_request_threaded_irq(dev, client->irq, NULL, sx150x_irq_thread_fn, @@ -1237,12 +1232,17 @@ static int sx150x_probe(struct i2c_client *client, pctl->irq_chip.name, pctl); if (ret < 0) return ret; - - gpiochip_set_nested_irqchip(&pctl->gpio, - &pctl->irq_chip, - client->irq); } + ret = devm_gpiochip_add_data(dev, &pctl->gpio, pctl); + if (ret) + return ret; + + ret = gpiochip_add_pin_range(&pctl->gpio, dev_name(dev), + 0, 0, pctl->data->npins); + if (ret) + return ret; + return 0; } |