Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of the pin control changes for the v5.9 kernel
  series:

  Core changes:

   - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
     macro" was put in an immutable branch and merged into the pinctrl
     tree as well. We see these changes also here.

   - Improved debug output for pins used as GPIO.

  New drivers:

   - Ocelot Sparx5 SoC driver.

   - Intel Emmitsburg SoC subdriver.

   - Intel Tiger Lake-H SoC subdriver.

   - Qualcomm PM660 SoC subdriver.

   - Renesas SH-PFC R8A774E1 subdriver.

  Driver improvements:

   - Linear improvement and cleanups of the Intel drivers for
     Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
     things.

   - Renesas SH-PFC has added support for RPC pins, groups, and
     functions to r8a77970 and r8a77980.

   - The newere Freescale (now NXP) i.MX8 pin controllers have been
     modularized. This is driven by the Google Android GKI initiative I
     think.

   - Open drain support for pins on the Qualcomm IPQ4019.

   - The Ingenic driver can handle both edges IRQ detection.

   - A big slew of documentation fixes all over the place.

   - A few irqchip template conversions by yours truly.

* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
  pinctrl: stmfx: Use irqchip template
  pinctrl: amd: Use irqchip template
  pinctrl: mediatek: fix build for tristate changes
  pinctrl: samsung: Use bank name as irqchip name
  pinctrl: core: print gpio in pins debugfs file
  pinctrl: mediatek: add mt6779 eint support
  pinctrl: mediatek: add pinctrl support for MT6779 SoC
  pinctrl: mediatek: avoid virtual gpio trying to set reg
  pinctrl: mediatek: update pinmux definitions for mt6779
  pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
  pinctrl: mcp23s08: Use irqchip template
  pinctrl: sx150x: Use irqchip template
  dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
  pinctrl: intel: Add Intel Emmitsburg pin controller support
  pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
  Revert "gpio: omap: handle pin config bias flags"
  pinctrl: single: Use fallthrough pseudo-keyword
  pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
  pinctrl: baytrail: Use fallthrough pseudo-keyword
  ...

1 files changed, 27 insertions, 6 deletions

diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c
index 821242bb4b16..3663d87f51a0 100644
--- a/drivers/pinctrl/core.c
+++ b/drivers/pinctrl/core.c
@@ -27,6 +27,7 @@
 #include <linux/pinctrl/machine.h>
 
 #ifdef CONFIG_GPIOLIB
+#include "../gpio/gpiolib.h"
 #include <asm-generic/gpio.h>
 #endif
 
@@ -161,7 +162,7 @@ int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
 /**
  * pin_get_name_from_id() - look up a pin name from a pin id
  * @pctldev: the pin control device to lookup the pin on
- * @name: the name of the pin to look up
+ * @pin: pin number/id to look up
  */
 const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
 {
@@ -577,7 +578,7 @@ EXPORT_SYMBOL_GPL(pinctrl_generic_get_group_pins);
 /**
  * pinctrl_generic_get_group() - returns a pin group based on the number
  * @pctldev: pin controller device
- * @gselector: group number
+ * @selector: group number
  */
 struct group_desc *pinctrl_generic_get_group(struct pinctrl_dev *pctldev,
 					     unsigned int selector)
@@ -1329,7 +1330,7 @@ static void devm_pinctrl_release(struct device *dev, void *res)
 }
 
 /**
- * struct devm_pinctrl_get() - Resource managed pinctrl_get()
+ * devm_pinctrl_get() - Resource managed pinctrl_get()
  * @dev: the device to obtain the handle for
  *
  * If there is a need to explicitly destroy the returned struct pinctrl,
@@ -1451,7 +1452,7 @@ EXPORT_SYMBOL_GPL(pinctrl_register_mappings);
 
 /**
  * pinctrl_unregister_mappings() - unregister a set of pin controller mappings
- * @maps: the pincontrol mappings table passed to pinctrl_register_mappings()
+ * @map: the pincontrol mappings table passed to pinctrl_register_mappings()
  *	when registering the mappings.
  */
 void pinctrl_unregister_mappings(const struct pinctrl_map *map)
@@ -1601,6 +1602,9 @@ static int pinctrl_pins_show(struct seq_file *s, void *what)
 	struct pinctrl_dev *pctldev = s->private;
 	const struct pinctrl_ops *ops = pctldev->desc->pctlops;
 	unsigned i, pin;
+	struct pinctrl_gpio_range *range;
+	unsigned int gpio_num;
+	struct gpio_chip *chip;
 
 	seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
 
@@ -1618,6 +1622,23 @@ static int pinctrl_pins_show(struct seq_file *s, void *what)
 
 		seq_printf(s, "pin %d (%s) ", pin, desc->name);
 
+#ifdef CONFIG_GPIOLIB
+		gpio_num = 0;
+		list_for_each_entry(range, &pctldev->gpio_ranges, node) {
+			if ((pin >= range->pin_base) &&
+			    (pin < (range->pin_base + range->npins))) {
+				gpio_num = range->base + (pin - range->pin_base);
+				break;
+			}
+		}
+		chip = gpio_to_chip(gpio_num);
+		if (chip && chip->gpiodev && chip->gpiodev->base)
+			seq_printf(s, "%u:%s ", gpio_num -
+				chip->gpiodev->base, chip->label);
+		else
+			seq_puts(s, "0:? ");
+#endif
+
 		/* Driver-specific info per pin */
 		if (ops->pin_dbg_show)
 			ops->pin_dbg_show(pctldev, s, pin);
@@ -2226,9 +2247,9 @@ EXPORT_SYMBOL_GPL(devm_pinctrl_register);
  * @dev: parent device for this pin controller
  * @pctldesc: descriptor for this pin controller
  * @driver_data: private pin controller data for this pin controller
+ * @pctldev: pin controller device
  *
- * Returns an error pointer if pincontrol register failed. Otherwise
- * it returns valid pinctrl handle.
+ * Returns zero on success or an error number on failure.
  *
  * The pinctrl device will be automatically released when the device is unbound.
  */