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authorAndrew Jeffery <andrew@aj.id.au>2019-07-11 13:49:42 +0930
committerLinus Walleij <linus.walleij@linaro.org>2019-08-05 12:41:18 +0200
commit2eda1cdec49f8ae7878e60d1b06bd8157a95424f (patch)
tree37e7778f68b8f7ad4e697fe9f6dd01195574d34e /drivers/pinctrl/aspeed/Makefile
parent86392fac9a9c92f36c0a422a3075865a0fe959f9 (diff)
downloadlinux-2eda1cdec49f8ae7878e60d1b06bd8157a95424f.tar.bz2
pinctrl: aspeed: Add AST2600 pinmux support
The AST2600 pinmux is fairly similar to the previous generations of ASPEED BMC SoCs in terms of architecture, though differ in some of the design details. The complexity of the pin expressions is largely reduced (e.g. there are no-longer signals with multiple expressions muxing them to the associated pin), and there are now signals and buses with multiple pin groups. The driver implements pinmux support for all 244 GPIO-capable pins plus a further four pins that are not GPIO capable but which expose multiple signals. pinconf will be implemented in a follow-up patch. The implementation has been smoke-tested under qemu, and run on hardware by ASPEED. Debugged-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190711041942.23202-7-andrew@aj.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/aspeed/Makefile')
-rw-r--r--drivers/pinctrl/aspeed/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/aspeed/Makefile b/drivers/pinctrl/aspeed/Makefile
index ea8962645e49..489ea1778353 100644
--- a/drivers/pinctrl/aspeed/Makefile
+++ b/drivers/pinctrl/aspeed/Makefile
@@ -5,3 +5,4 @@ ccflags-y += $(call cc-option,-Woverride-init)
obj-$(CONFIG_PINCTRL_ASPEED) += pinctrl-aspeed.o pinmux-aspeed.o
obj-$(CONFIG_PINCTRL_ASPEED_G4) += pinctrl-aspeed-g4.o
obj-$(CONFIG_PINCTRL_ASPEED_G5) += pinctrl-aspeed-g5.o
+obj-$(CONFIG_PINCTRL_ASPEED_G6) += pinctrl-aspeed-g6.o