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authorRoger Quadros <rogerq@ti.com>2019-03-22 10:58:07 +0200
committerKishon Vijay Abraham I <kishon@ti.com>2019-04-17 14:13:07 +0530
commit1d1bae7250758904ab09458022e2d97c23cf42b7 (patch)
treee4c8d151baca857511c56254c40ff963071f3fe3 /drivers/phy
parent9d009d9c20624cd8ed2a3ae0e43752c4a34b4893 (diff)
downloadlinux-1d1bae7250758904ab09458022e2d97c23cf42b7.tar.bz2
phy: ti-pipe3: Fix PCIe power up sequence
TRM [1] mentions that we need to power up PCIESS_PHY_TX and PCIESS_PHY_RX before configuring PCIe_PHY_RX SCP settings. See "Table 26-81. PCIePHY Subsystem Low-Level Programming Sequence". [1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/ti/phy-ti-pipe3.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/phy/ti/phy-ti-pipe3.c b/drivers/phy/ti/phy-ti-pipe3.c
index aa5eab478039..739aaa0eb0ef 100644
--- a/drivers/phy/ti/phy-ti-pipe3.c
+++ b/drivers/phy/ti/phy-ti-pipe3.c
@@ -341,6 +341,8 @@ static int ti_pipe3_power_off(struct phy *x)
return ret;
}
+static void ti_pipe3_calibrate(struct ti_pipe3 *phy);
+
static int ti_pipe3_power_on(struct phy *x)
{
u32 val;
@@ -386,6 +388,9 @@ static int ti_pipe3_power_on(struct phy *x)
mask, val);
}
+ if (phy->mode == PIPE3_MODE_PCIE)
+ ti_pipe3_calibrate(phy);
+
return 0;
}
@@ -520,12 +525,7 @@ static int ti_pipe3_init(struct phy *x)
val = 0x96 << OMAP_CTRL_PCIE_PCS_DELAY_COUNT_SHIFT;
ret = regmap_update_bits(phy->pcs_syscon, phy->pcie_pcs_reg,
PCIE_PCS_MASK, val);
- if (ret)
- return ret;
-
- ti_pipe3_calibrate(phy);
-
- return 0;
+ return ret;
}
/* Bring it out of IDLE if it is IDLE */