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authorBjorn Helgaas <bhelgaas@google.com>2017-02-21 15:15:05 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-02-21 15:15:05 -0600
commit68094b4b8d72360f9a90804c203e4292c6662fdd (patch)
tree79ab1eb0d6ee4621863680c541b3be67bc662329 /drivers/pci/quirks.c
parente34e38bf891bd7bf7c9305ff1d2e1b29a77dd159 (diff)
parentce709f86501a013e941e9986cb072eae375ddf3e (diff)
downloadlinux-68094b4b8d72360f9a90804c203e4292c6662fdd.tar.bz2
Merge branch 'pci/host-iproc' into next
* pci/host-iproc: PCI: Add Broadcom Northstar2 PAXC quirk for device class and MPSS PCI: iproc: Configure PCIe MPS settings PCI: iproc: Use of_device_get_match_data() to simplify probe
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 3deff4a98932..6079a4ddf132 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2240,6 +2240,27 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_BROADCOM,
PCI_DEVICE_ID_TIGON3_5719,
quirk_brcm_5719_limit_mrrs);
+#ifdef CONFIG_PCIE_IPROC_PLATFORM
+static void quirk_paxc_bridge(struct pci_dev *pdev)
+{
+ /* The PCI config space is shared with the PAXC root port and the first
+ * Ethernet device. So, we need to workaround this by telling the PCI
+ * code that the bridge is not an Ethernet device.
+ */
+ if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
+ pdev->class = PCI_CLASS_BRIDGE_PCI << 8;
+
+ /* MPSS is not being set properly (as it is currently 0). This is
+ * because that area of the PCI config space is hard coded to zero, and
+ * is not modifiable by firmware. Set this to 2 (e.g., 512 byte MPS)
+ * so that the MPS can be set to the real max value.
+ */
+ pdev->pcie_mpss = 2;
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16cd, quirk_paxc_bridge);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x16f0, quirk_paxc_bridge);
+#endif
+
/* Originally in EDAC sources for i82875P:
* Intel tells BIOS developers to hide device 6 which
* configures the overflow device access containing