diff options
author | Shlomo Pongratz <shlomopongratz@gmail.com> | 2022-04-10 13:52:13 +0300 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-04-11 13:21:41 -0500 |
commit | 1af7c26c59ebcf241e865dd16dcc251e61472a37 (patch) | |
tree | dffa70c954092213f3d46d81114c909ed713d79f /drivers/pci/controller/pcie-mediatek.c | |
parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) | |
download | linux-1af7c26c59ebcf241e865dd16dcc251e61472a37.tar.bz2 |
PCI/P2PDMA: Whitelist Intel Skylake-E Root Ports at any devfn
In 7b94b53db34f ("PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, D to
the whitelist"), Andrew Maier added Skylake-E 2031, 2032, and 2033 Root
Ports to the pci_p2pdma_whitelist[], so we assume P2PDMA between devices
below these ports works.
Previously we only checked the whitelist for a device at devfn 00.0 on the
root bus, which is often a "host bridge". But these Skylake Root Ports may
be at any devfn and there may be no "host bridge" device.
Generalize pci_host_bridge_dev() so we check the first device on the root
bus, whether it is devfn 00.0 or a PCIe Root Port, against the whitelist.
[bhelgaas: commit log, comment]
Link: https://lore.kernel.org/r/20220410105213.690-2-shlomop@pliops.com
Tested-by: Maor Gottlieb <maorg@nvidia.com>
Signed-off-by: Shlomo Pongratz <shlomop@pliops.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Andrew Maier <andrew.maier@eideticom.com>
Diffstat (limited to 'drivers/pci/controller/pcie-mediatek.c')
0 files changed, 0 insertions, 0 deletions