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| author | Vidya Sagar <vidyas@nvidia.com> | 2022-09-19 20:03:40 +0530 |
|---|---|---|
| committer | Lorenzo Pieralisi <lpieralisi@kernel.org> | 2022-10-27 14:42:56 +0200 |
| commit | 442ae919e6ca77354551a7b8717746b44272e274 (patch) | |
| tree | 8b4e8810be409663bf444d76b92f1df2a66a65d5 /drivers/pci/controller/pcie-altera.c | |
| parent | e32e1e26c4098d8a866ce09fd26d8004da4ddf9e (diff) | |
| download | linux-442ae919e6ca77354551a7b8717746b44272e274.tar.bz2 | |
PCI: designware-ep: Disable PTM capabilities for EP mode
Dual mode DesignWare PCIe IP has PTM capability enabled (if supported) even
in the EP mode. The PCIe compliance for the EP mode expects PTM
capabilities (ROOT_CAPABLE, RES_CAPABLE, CLK_GRAN) be disabled.
Hence disable PTM for the EP mode.
Link: https://lore.kernel.org/r/20220919143340.4527-3-vidyas@nvidia.com
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Diffstat (limited to 'drivers/pci/controller/pcie-altera.c')
0 files changed, 0 insertions, 0 deletions