diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2022-05-18 17:35:27 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-08-01 15:34:13 -0500 |
| commit | 13f8f3d1e369f56dfaeea10a2238d56bc36c876c (patch) | |
| tree | 7dcdb5726f3140c17495cee99397d023effeb314 /drivers/pci/controller/dwc | |
| parent | 835a345b18b013cc03b0fc392394fbccd61d4efb (diff) | |
| download | linux-13f8f3d1e369f56dfaeea10a2238d56bc36c876c.tar.bz2 | |
PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registers
The PCIE_DBI_RO_WR_EN bit should be set when write some DBI registers. To
make sure that the DBI registers are writable, set the PCIE_DBI_RO_WR_EN
properly when writing the DBI registers.
Link: https://lore.kernel.org/r/1652866528-13220-1-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/controller/dwc')
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 81ab6ddb0d59..d11032388d23 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -830,10 +830,12 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) * started in Gen2 mode, there is a possibility the devices on the * bus will not be detected at all. This happens with PCIe switches. */ + dw_pcie_dbi_ro_wr_en(pci); tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); tmp &= ~PCI_EXP_LNKCAP_SLS; tmp |= PCI_EXP_LNKCAP_SLS_2_5GB; dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp); + dw_pcie_dbi_ro_wr_dis(pci); /* Start LTSSM. */ imx6_pcie_ltssm_enable(dev); @@ -844,6 +846,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) if (pci->link_gen == 2) { /* Allow Gen2 mode after the link is up. */ + dw_pcie_dbi_ro_wr_en(pci); tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP); tmp &= ~PCI_EXP_LNKCAP_SLS; tmp |= PCI_EXP_LNKCAP_SLS_5_0GB; @@ -856,6 +859,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci) tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL); tmp |= PORT_LOGIC_SPEED_CHANGE; dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp); + dw_pcie_dbi_ro_wr_dis(pci); if (imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE) { |