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| author | John Harrison <John.C.Harrison@Intel.com> | 2022-01-06 16:06:20 -0800 |
|---|---|---|
| committer | John Harrison <John.C.Harrison@Intel.com> | 2022-01-11 11:47:35 -0800 |
| commit | 53c8283ba9b46559c12fb9fd679cbaf72424649e (patch) | |
| tree | 11acb02001fdf08283c2212769401158eab7c88d /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
| parent | 60dc43d1190db1bf80c696ab4561ed53f8f42f33 (diff) | |
| download | linux-53c8283ba9b46559c12fb9fd679cbaf72424649e.tar.bz2 | |
drm/i915/guc: Temporarily bump the GuC load timeout
There is a known (but exceedingly unlikely) race condition where the
asynchronous frequency management code could reduce the GT clock while
a GuC reload is in progress (during a full GT reset). A fix is in
progress but there are complex locking issues to be resolved. In the
meantime bump the timeout to 200ms. Even at slowest clock, this
should be sufficient. And in the working case, a larger timeout makes
no difference.
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220107000622.292081-2-John.C.Harrison@Intel.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
0 files changed, 0 insertions, 0 deletions