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authorPing-Ke Shih <pkshih@realtek.com>2020-05-12 18:26:14 +0800
committerKalle Valo <kvalo@codeaurora.org>2020-05-13 18:48:43 +0300
commit1d229e88e53c20717a51ef8d8f9a69573167543a (patch)
tree39bbd06196cf70e04204d1e95905b323515f61b4 /drivers/net/wireless/realtek/rtw88/phy.c
parentf71eb7f603170bf8742c53c9fb72a64df04cb6e4 (diff)
downloadlinux-1d229e88e53c20717a51ef8d8f9a69573167543a.tar.bz2
rtw88: 8723d: add IQ calibration
IQ calibration is used to calibrate RF characteristic to yield expected performance. Basically, we do calibration twice and compare the similarity to determine calibration is good or not, if not we do the third calibration, and then compare with the results of first and second calibration. If it still not similar, IQK is failed. Before doing calibration, we need to backup registers that will be modified in calibration procedure, and restore these registers after calibration is done. A calibration procedure can divided into four sub-procedures that are S1-TX, S1-RX, S0-TX and S0-RX. Where, S1 and S0 represent to path A and B respectively. Each sub-procedure configure proper registers, and then rigger one-shot calibration and poll until completion. For RX calibration, it needs to do twice one-shot calibration, first one is to yield parameter used by second one. The result of TX part is stored for TX power tracking that adjusts TX AGC to output expected power. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200512102621.5148-3-yhchuang@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw88/phy.c')
-rw-r--r--drivers/net/wireless/realtek/rtw88/phy.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/phy.c b/drivers/net/wireless/realtek/rtw88/phy.c
index 72a16eff9db3..837b7bd04126 100644
--- a/drivers/net/wireless/realtek/rtw88/phy.c
+++ b/drivers/net/wireless/realtek/rtw88/phy.c
@@ -134,6 +134,8 @@ void rtw_phy_init(struct rtw_dev *rtwdev)
mask = chip->dig[0].mask;
dm_info->igi_history[0] = rtw_read32_mask(rtwdev, addr, mask);
rtw_phy_cck_pd_init(rtwdev);
+
+ dm_info->iqk.done = false;
}
void rtw_phy_dig_write(struct rtw_dev *rtwdev, u8 igi)