diff options
| author | Zong-Zhe Yang <kevin_yang@realtek.com> | 2021-09-27 19:18:30 +0800 |
|---|---|---|
| committer | Kalle Valo <kvalo@codeaurora.org> | 2021-10-05 08:27:48 +0300 |
| commit | c5a8e90730a322f236731fc347dd3afa5db5550e (patch) | |
| tree | f3f5e88bcc77de188d61fc56bb8894c81b80041c /drivers/net/wireless/realtek/rtw88/fw.c | |
| parent | a8e5387f8362e9da66fdc76a2e761ad618ae16db (diff) | |
| download | linux-c5a8e90730a322f236731fc347dd3afa5db5550e.tar.bz2 | |
rtw88: fix RX clock gate setting while fifo dump
When fw fifo dumps, RX clock gating should be disabled to avoid
something unexpected. However, the register operation ran into
a mistake. So, we fix it.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210927111830.5354-1-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw88/fw.c')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw88/fw.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/drivers/net/wireless/realtek/rtw88/fw.c b/drivers/net/wireless/realtek/rtw88/fw.c index ccd8221ab264..0c4f2a2f2d7f 100644 --- a/drivers/net/wireless/realtek/rtw88/fw.c +++ b/drivers/net/wireless/realtek/rtw88/fw.c @@ -1582,12 +1582,10 @@ static void rtw_fw_read_fifo_page(struct rtw_dev *rtwdev, u32 offset, u32 size, u32 i; u16 idx = 0; u16 ctl; - u8 rcr; - rcr = rtw_read8(rtwdev, REG_RCR + 2); ctl = rtw_read16(rtwdev, REG_PKTBUF_DBG_CTRL) & 0xf000; /* disable rx clock gate */ - rtw_write8(rtwdev, REG_RCR, rcr | BIT(3)); + rtw_write32_set(rtwdev, REG_RCR, BIT_DISGCLK); do { rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, start_pg | ctl); @@ -1606,7 +1604,8 @@ static void rtw_fw_read_fifo_page(struct rtw_dev *rtwdev, u32 offset, u32 size, out: rtw_write16(rtwdev, REG_PKTBUF_DBG_CTRL, ctl); - rtw_write8(rtwdev, REG_RCR + 2, rcr); + /* restore rx clock gate */ + rtw_write32_clr(rtwdev, REG_RCR, BIT_DISGCLK); } static void rtw_fw_read_fifo(struct rtw_dev *rtwdev, enum rtw_fw_fifo_sel sel, |