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authorWong, Vee Khee <vee.khee.wong@intel.com>2021-03-17 09:32:47 +0800
committerDavid S. Miller <davem@davemloft.net>2021-03-18 19:10:51 -0700
commit76da35dc99afb460b9c335182ba6a3e7ff924186 (patch)
tree06027c5dd0bf95971dcf3639276e8b9864693661 /drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
parentd7417ee918582504076ec1a74dfcd5fe1f55696c (diff)
downloadlinux-76da35dc99afb460b9c335182ba6a3e7ff924186.tar.bz2
stmmac: intel: Add PSE and PCH PTP clock source selection
Intel mGbE variant implemented in EHL and TGL can be set to select different clock frequency based on GPO bits in MAC_GPIO_STATUS register. We introduce a new "void (*ptp_clk_freq_config)(void *priv)" in platform data so that if a platform is required to configure the frequency of clock source, in this case Intel mGBE does, the platform-specific configuration of the PTP clock setting is done when stmmac_ptp_register() is called. Signed-off-by: Wong, Vee Khee <vee.khee.wong@intel.com> Signed-off-by: Voon Weifeng <weifeng.voon@intel.com> Co-developed-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
index 0989e2bb6ee3..8b10fd10446f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
@@ -192,6 +192,9 @@ void stmmac_ptp_register(struct stmmac_priv *priv)
{
int i;
+ if (priv->plat->ptp_clk_freq_config)
+ priv->plat->ptp_clk_freq_config(priv);
+
for (i = 0; i < priv->dma_cap.pps_out_num; i++) {
if (i >= STMMAC_PPS_MAX)
break;