diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2021-10-01 16:06:36 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-02 13:52:46 +0100 |
| commit | 16a2351992353ca7f12824c81feed783306d7f5f (patch) | |
| tree | f23a73f4331f128c4b05c85bf349138505b22519 /drivers/net/ethernet/renesas/ravb.h | |
| parent | 68aa0763c045aefa138b224a3524b3f5b0cf6a01 (diff) | |
| download | linux-16a2351992353ca7f12824c81feed783306d7f5f.tar.bz2 | |
ravb: Initialize GbEthernet E-MAC
Initialize GbEthernet E-MAC found on RZ/G2L SoC.
This patch also renames ravb_set_rate to ravb_set_rate_rcar and
ravb_rcar_emac_init to ravb_emac_init_rcar to be consistent with
the naming convention used in sh_eth driver.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas/ravb.h')
| -rw-r--r-- | drivers/net/ethernet/renesas/ravb.h | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/net/ethernet/renesas/ravb.h b/drivers/net/ethernet/renesas/ravb.h index d83d3b4f3f5f..5dc1324786e0 100644 --- a/drivers/net/ethernet/renesas/ravb.h +++ b/drivers/net/ethernet/renesas/ravb.h @@ -188,6 +188,7 @@ enum ravb_reg { PIR = 0x0520, PSR = 0x0528, PIPR = 0x052c, + CXR31 = 0x0530, /* RZ/G2L only */ MPR = 0x0558, PFTCR = 0x055c, PFRCR = 0x0560, @@ -811,10 +812,11 @@ enum ECMR_BIT { ECMR_TXF = 0x00010000, /* Documented for R-Car Gen3 only */ ECMR_RXF = 0x00020000, ECMR_PFR = 0x00040000, - ECMR_ZPF = 0x00080000, /* Documented for R-Car Gen3 only */ + ECMR_ZPF = 0x00080000, /* Documented for R-Car Gen3 and RZ/G2L */ ECMR_RZPF = 0x00100000, ECMR_DPAD = 0x00200000, ECMR_RCSC = 0x00800000, + ECMR_RCPT = 0x02000000, /* Documented for RZ/G2L only */ ECMR_TRCCM = 0x04000000, }; @@ -824,6 +826,7 @@ enum ECSR_BIT { ECSR_MPD = 0x00000002, ECSR_LCHNG = 0x00000004, ECSR_PHYI = 0x00000008, + ECSR_PFRI = 0x00000010, }; /* ECSIPR */ @@ -858,9 +861,13 @@ enum MPR_BIT { /* GECMR */ enum GECMR_BIT { - GECMR_SPEED = 0x00000001, - GECMR_SPEED_100 = 0x00000000, - GECMR_SPEED_1000 = 0x00000001, + GECMR_SPEED = 0x00000001, + GECMR_SPEED_100 = 0x00000000, + GECMR_SPEED_1000 = 0x00000001, + GBETH_GECMR_SPEED = 0x00000030, + GBETH_GECMR_SPEED_10 = 0x00000000, + GBETH_GECMR_SPEED_100 = 0x00000010, + GBETH_GECMR_SPEED_1000 = 0x00000020, }; /* The Ethernet AVB descriptor definitions. */ @@ -950,6 +957,11 @@ enum RAVB_QUEUE { RAVB_NC, /* Network Control Queue */ }; +enum CXR31_BIT { + CXR31_SEL_LINK0 = 0x00000001, + CXR31_SEL_LINK1 = 0x00000008, +}; + #define DBAT_ENTRY_NUM 22 #define RX_QUEUE_OFFSET 4 #define NUM_RX_QUEUE 2 |