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authorJacob Keller <jacob.e.keller@intel.com>2021-10-13 08:52:29 -0700
committerTony Nguyen <anthony.l.nguyen@intel.com>2021-12-21 09:11:02 -0800
commitb2ee72565cd0ee24d2067e3de9094a14644493a8 (patch)
tree407ceaee968cd828f6eea27fa3d2c7260114ae3b /drivers/net/ethernet/intel/ice/ice_ptp_hw.c
parent39b2810642e85f8191cc5494bc4019888ec57cbf (diff)
downloadlinux-b2ee72565cd0ee24d2067e3de9094a14644493a8.tar.bz2
ice: introduce ice_ptp_init_phc function
When we enable support for E822 devices, there are some additional steps required to initialize the PTP hardware clock. To make this easier to implement as device-specific behavior, refactor the register setups in ice_ptp_init_owner to a new ice_ptp_init_phc function defined in ice_ptp_hw.c This function will have a common section, and an e810 specific sub-implementation. This will enable easily extending the functionality to cover the E822 specific setup required to initialize the hardware clock generation unit. It also makes it clear which steps are E810 specific vs which ones are necessary for all ice devices. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Tested-by: Gurucharan G <gurucharanx.g@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_ptp_hw.c')
-rw-r--r--drivers/net/ethernet/intel/ice/ice_ptp_hw.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index 859805012387..bcc280094f7f 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -214,6 +214,21 @@ int ice_ptp_init_phy_e810(struct ice_hw *hw)
}
/**
+ * ice_ptp_init_phc_e810 - Perform E810 specific PHC initialization
+ * @hw: pointer to HW struct
+ *
+ * Perform E810-specific PTP hardware clock initialization steps.
+ */
+static int ice_ptp_init_phc_e810(struct ice_hw *hw)
+{
+ /* Ensure synchronization delay is zero */
+ wr32(hw, GLTSYN_SYNC_DLAY, 0);
+
+ /* Initialize the PHY */
+ return ice_ptp_init_phy_e810(hw);
+}
+
+/**
* ice_ptp_prep_phy_time_e810 - Prepare PHY port with initial time
* @hw: Board private structure
* @time: Time to initialize the PHY port clock to
@@ -800,3 +815,22 @@ bool ice_is_pca9575_present(struct ice_hw *hw)
return !status && handle;
}
+
+/**
+ * ice_ptp_init_phc - Initialize PTP hardware clock
+ * @hw: pointer to the HW struct
+ *
+ * Perform the steps required to initialize the PTP hardware clock.
+ */
+int ice_ptp_init_phc(struct ice_hw *hw)
+{
+ u8 src_idx = hw->func_caps.ts_func_info.tmr_index_owned;
+
+ /* Enable source clocks */
+ wr32(hw, GLTSYN_ENA(src_idx), GLTSYN_ENA_TSYN_ENA_M);
+
+ /* Clear event err indications for auxiliary pins */
+ (void)rd32(hw, GLTSYN_STAT(src_idx));
+
+ return ice_ptp_init_phc_e810(hw);
+}