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| author | Florian Fainelli <f.fainelli@gmail.com> | 2017-08-29 12:25:31 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2017-08-29 16:09:07 -0700 |
| commit | 69d2ea9c798983c4a7157278ec84ff969d1cd8e8 (patch) | |
| tree | b91dd8be8448731070c46e3219812996bf5d3410 /drivers/net/ethernet/broadcom/genet/bcmgenet.h | |
| parent | b6eb9d500087a79feab2be8adb84826ffc955690 (diff) | |
| download | linux-69d2ea9c798983c4a7157278ec84ff969d1cd8e8.tar.bz2 | |
net: bcmgenet: Use correct I/O accessors
The GENET driver currently uses __raw_{read,write}l which means
native I/O endian. This works correctly for an ARM LE kernel (default)
but fails miserably on an ARM BE (BE8) kernel where registers are kept
little endian, so replace uses with {read,write}l_relaxed here which is
what we want because this is all performance sensitive code.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/genet/bcmgenet.h')
| -rw-r--r-- | drivers/net/ethernet/broadcom/genet/bcmgenet.h | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h index b1fdd3cc10d1..2bfeaefcca0f 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h @@ -672,12 +672,21 @@ struct bcmgenet_priv { static inline u32 bcmgenet_##name##_readl(struct bcmgenet_priv *priv, \ u32 off) \ { \ - return __raw_readl(priv->base + offset + off); \ + /* MIPS chips strapped for BE will automagically configure the \ + * peripheral registers for CPU-native byte order. \ + */ \ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) \ + return __raw_readl(priv->base + offset + off); \ + else \ + return readl_relaxed(priv->base + offset + off); \ } \ static inline void bcmgenet_##name##_writel(struct bcmgenet_priv *priv, \ u32 val, u32 off) \ { \ - __raw_writel(val, priv->base + offset + off); \ + if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN)) \ + return __raw_writel(val, priv->base + offset + off); \ + else \ + writel_relaxed(val, priv->base + offset + off); \ } GENET_IO_MACRO(ext, GENET_EXT_OFF); |