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| author | Florian Fainelli <f.fainelli@gmail.com> | 2021-10-22 09:17:03 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2021-10-24 13:42:28 +0100 |
| commit | 3cd92eae9104a3dc1aa3a2de020e801061b947af (patch) | |
| tree | 32e9c6c1484e27c3259920affc7a7a14dc34e3b6 /drivers/net/ethernet/broadcom/genet/bcmgenet.h | |
| parent | f4b054d9bb2b165296fbf4524f386d5b8a4aa455 (diff) | |
| download | linux-3cd92eae9104a3dc1aa3a2de020e801061b947af.tar.bz2 | |
net: bcmgenet: Add support for 7712 16nm internal EPHY
The 16nm internal EPHY that is present in 7712 is actually a 16nm
Gigabit PHY which has been forced to operate in 10/100 mode. Its
controls are therefore via the EXT_GPHY_CTRL registers and not via the
EXT_EPHY_CTRL which are used for all GENETv5 adapters. Add a match on
the 7712 compatible string to allow that differentiation to happen.
On previous GENETv4 chips the EXT_CFG_IDDQ_GLOBAL_PWR bit was cleared by
default, but this is not the case with this chip, so we need to make
sure we clear it to power on the EPHY.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/genet/bcmgenet.h')
| -rw-r--r-- | drivers/net/ethernet/broadcom/genet/bcmgenet.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h index 1cc2838e52c6..946f6e283c4e 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h @@ -329,6 +329,7 @@ struct bcmgenet_mib_counters { #define EXT_CFG_IDDQ_BIAS (1 << 0) #define EXT_CFG_PWR_DOWN (1 << 1) #define EXT_CK25_DIS (1 << 4) +#define EXT_CFG_IDDQ_GLOBAL_PWR (1 << 3) #define EXT_GPHY_RESET (1 << 5) /* DMA rings size */ @@ -612,6 +613,7 @@ struct bcmgenet_priv { phy_interface_t phy_interface; int phy_addr; int ext_phy; + bool ephy_16nm; /* Interrupt variables */ struct work_struct bcmgenet_irq_work; |