diff options
| author | Doug Berger <opendmb@gmail.com> | 2020-04-29 13:02:02 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2020-04-29 16:55:22 -0700 |
| commit | 1a1d5106c1e37321f3fe394b786d1aece56d0df5 (patch) | |
| tree | 494789d35155849519b848b63a5bba0a12e1ccf5 /drivers/net/ethernet/broadcom/genet/bcmgenet.c | |
| parent | 6f7689057a0f10a6c967b9f2759d7a3dc948b930 (diff) | |
| download | linux-1a1d5106c1e37321f3fe394b786d1aece56d0df5.tar.bz2 | |
net: bcmgenet: move clk_wol management to bcmgenet_wol
The GENET_POWER_WOL_MAGIC power up and power down code configures
the device for WoL when suspending and disables the WoL logic when
resuming. It makes sense that this code should also manage the WoL
clocking.
This commit consolidates the logic and moves it earlier in the
resume sequence.
Since the clock is now only enabled if WoL is successfully entered
the wol_active flag is introduced to track that state to keep the
clock enables and disables balanced in case a suspend is aborted.
The MPD_EN hardware bit can't be used because it can be cleared
when the MAC is reset by a deep sleep.
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/genet/bcmgenet.c')
| -rw-r--r-- | drivers/net/ethernet/broadcom/genet/bcmgenet.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c index eb0dd4d4800c..57b8608feae1 100644 --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c @@ -2,7 +2,7 @@ /* * Broadcom GENET (Gigabit Ethernet) controller driver * - * Copyright (c) 2014-2019 Broadcom + * Copyright (c) 2014-2020 Broadcom */ #define pr_fmt(fmt) "bcmgenet: " fmt @@ -3619,6 +3619,10 @@ static int bcmgenet_resume(struct device *d) if (ret) return ret; + /* From WOL-enabled suspend, switch to regular clock */ + if (device_may_wakeup(d) && priv->wolopts) + bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC); + /* If this is an internal GPHY, power it back on now, before UniMAC is * brought out of reset as absolutely no UniMAC activity is allowed */ @@ -3629,10 +3633,6 @@ static int bcmgenet_resume(struct device *d) init_umac(priv); - /* From WOL-enabled suspend, switch to regular clock */ - if (priv->wolopts) - clk_disable_unprepare(priv->clk_wol); - phy_init_hw(dev->phydev); /* Speed settings must be restored */ @@ -3650,9 +3650,6 @@ static int bcmgenet_resume(struct device *d) bcmgenet_ext_writel(priv, reg, EXT_EXT_PWR_MGMT); } - if (priv->wolopts) - bcmgenet_power_up(priv, GENET_POWER_WOL_MAGIC); - /* Disable RX/TX DMA and flush TX queues */ dma_ctrl = bcmgenet_dma_disable(priv); @@ -3702,12 +3699,10 @@ static int bcmgenet_suspend(struct device *d) phy_suspend(dev->phydev); /* Prepare the device for Wake-on-LAN and switch to the slow clock */ - if (device_may_wakeup(d) && priv->wolopts) { + if (device_may_wakeup(d) && priv->wolopts) ret = bcmgenet_power_down(priv, GENET_POWER_WOL_MAGIC); - clk_prepare_enable(priv->clk_wol); - } else if (priv->internal_phy) { + else if (priv->internal_phy) ret = bcmgenet_power_down(priv, GENET_POWER_PASSIVE); - } /* Turn off the clocks */ clk_disable_unprepare(priv->clk); |