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| author | Jethro Beekman <jethro@fortanix.com> | 2019-09-04 01:15:24 +0000 |
|---|---|---|
| committer | Tudor Ambarus <tudor.ambarus@microchip.com> | 2019-10-23 09:27:18 +0300 |
| commit | 4b97ba73dcdc24fd968cbeb970ae57212e2c1c73 (patch) | |
| tree | 8699ecccfaecd80bcfbfc90e2dd514bade783fd0 /drivers/mtd/spi-nor/intel-spi.c | |
| parent | 3912970809cfbc005bf0b404b9d286a95def694e (diff) | |
| download | linux-4b97ba73dcdc24fd968cbeb970ae57212e2c1c73.tar.bz2 | |
mtd: spi-nor: intel-spi: add support for Intel Cannon Lake SPI flash
Now that SPI flash controllers without a software sequencer are
supported, it's trivial to add support for CNL and its PCI ID.
Values from https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/300-series-chipset-pch-datasheet-vol-2.pdf
Signed-off-by: Jethro Beekman <jethro@fortanix.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Diffstat (limited to 'drivers/mtd/spi-nor/intel-spi.c')
| -rw-r--r-- | drivers/mtd/spi-nor/intel-spi.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c index a85af3b65f2f..8420528dbaa8 100644 --- a/drivers/mtd/spi-nor/intel-spi.c +++ b/drivers/mtd/spi-nor/intel-spi.c @@ -108,6 +108,10 @@ #define BXT_FREG_NUM 12 #define BXT_PR_NUM 6 +#define CNL_PR 0x84 +#define CNL_FREG_NUM 6 +#define CNL_PR_NUM 5 + #define LVSCC 0xc4 #define UVSCC 0xc8 #define ERASE_OPCODE_SHIFT 8 @@ -344,6 +348,13 @@ static int intel_spi_init(struct intel_spi *ispi) ispi->erase_64k = true; break; + case INTEL_SPI_CNL: + ispi->sregs = NULL; + ispi->pregs = ispi->base + CNL_PR; + ispi->nregions = CNL_FREG_NUM; + ispi->pr_num = CNL_PR_NUM; + break; + default: return -EINVAL; } |