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| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-10-05 21:01:31 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <vigneshr@ti.com> | 2020-11-09 11:56:16 +0530 |
| commit | c6908077b194e46e7180d241ff2dbb85dc30bbd1 (patch) | |
| tree | 774ed8624d87587447b9c7ec40a245261744a2ea /drivers/mtd/spi-nor/core.h | |
| parent | 354b412967016e2f99fb2d5113e7b92b539f33b6 (diff) | |
| download | linux-c6908077b194e46e7180d241ff2dbb85dc30bbd1.tar.bz2 | |
mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILE
We don't want to enter a stateful mode, where a X-X-X I/O mode
is entered by setting a non-volatile bit, because in case of a
reset or a crash, once in the non-volatile mode, we may not be able
to recover in bootloaders and we may break the SPI NOR boot.
Forbid by default the I/O modes that are set via a non-volatile bit.
SPI_NOR_IO_MODE_EN_VOLATILE should be set just for the flashes that
don't define the optional SFDP SCCR Map, so that we don't pollute the
flash info flags.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20201005153138.6437-9-p.yadav@ti.com
Diffstat (limited to 'drivers/mtd/spi-nor/core.h')
| -rw-r--r-- | drivers/mtd/spi-nor/core.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 9a33c8d07335..eaece1123c0b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -26,6 +26,7 @@ enum spi_nor_option_flags { SNOR_F_HAS_SR_TB_BIT6 = BIT(11), SNOR_F_HAS_4BIT_BP = BIT(12), SNOR_F_HAS_SR_BP3_BIT6 = BIT(13), + SNOR_F_IO_MODE_EN_VOLATILE = BIT(14), }; struct spi_nor_read_command { @@ -320,6 +321,11 @@ struct flash_info { */ #define SPI_NOR_OCTAL_DTR_READ BIT(19) /* Flash supports octal DTR Read. */ #define SPI_NOR_OCTAL_DTR_PP BIT(20) /* Flash supports Octal DTR Page Program */ +#define SPI_NOR_IO_MODE_EN_VOLATILE BIT(21) /* + * Flash enables the best + * available I/O mode via a + * volatile bit. + */ /* Part specific fixup hooks. */ const struct spi_nor_fixups *fixups; |