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authorMichael Walle <michael@walle.cc>2022-02-23 14:43:51 +0100
committerTudor Ambarus <tudor.ambarus@microchip.com>2022-02-25 18:12:28 +0200
commit8f938262a6f37c4ca5e5f9552411877df2f93aab (patch)
tree729ecf0a308a3e3ffacd1305cd79f05b7aff61f9 /drivers/mtd/spi-nor/core.h
parentc770abe52d81089a8b8ecd1fe42722e29bbab5f5 (diff)
downloadlinux-8f938262a6f37c4ca5e5f9552411877df2f93aab.tar.bz2
mtd: spi-nor: micron-st: convert USE_FSR to a manufacturer flag
Now that all functions using that flag are local to the micron module, we can convert the flag to a manufacturer one. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220223134358.1914798-26-michael@walle.cc
Diffstat (limited to 'drivers/mtd/spi-nor/core.h')
-rw-r--r--drivers/mtd/spi-nor/core.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
index fabc01ae9a81..a02bf54289fb 100644
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -12,7 +12,6 @@
#define SPI_NOR_MAX_ID_LEN 6
enum spi_nor_option_flags {
- SNOR_F_USE_FSR = BIT(0),
SNOR_F_HAS_SR_TB = BIT(1),
SNOR_F_NO_OP_CHIP_ERASE = BIT(2),
SNOR_F_USE_CLSR = BIT(4),
@@ -349,7 +348,6 @@ struct spi_nor_fixups {
* NO_CHIP_ERASE: chip does not support chip erase.
* SPI_NOR_NO_FR: can't do fastread.
* USE_CLSR: use CLSR command.
- * USE_FSR: use flag status register
*
* @no_sfdp_flags: flags that indicate support that can be discovered via SFDP.
* Used when SFDP tables are not defined in the flash. These
@@ -401,7 +399,6 @@ struct flash_info {
#define NO_CHIP_ERASE BIT(7)
#define SPI_NOR_NO_FR BIT(8)
#define USE_CLSR BIT(9)
-#define USE_FSR BIT(10)
u8 no_sfdp_flags;
#define SPI_NOR_SKIP_SFDP BIT(0)