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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2018-07-14 12:23:54 +0200 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2018-07-19 23:14:13 +0200 |
| commit | 6a943386ee364155727f62711f6f3e898d824cdd (patch) | |
| tree | fdbec8192f90f54eedd70a22ba2c69d3e641741f /drivers/mtd/nand/raw/nand_timings.c | |
| parent | e8b0ac398f5ec16b249f5243d8011d490e3b91c0 (diff) | |
| download | linux-6a943386ee364155727f62711f6f3e898d824cdd.tar.bz2 | |
mtd: rawnand: add default values for dynamic timings
Some timings like tBERS (block erase time), tCCs (change column setup
time), tPROG (page program time) and tR (page read time) are derived
from the ONFI parameter page. They are set in the SDR interface only
if the chip is ONFI compliant.
It makes these timings unreliable and prevent the driver to use one of
these four values with a non-ONFI chip.
Fix this situation by taking the highest possible value (or a default
one) value for each missing timing (stored as unsigned 16-bit entries in
the parameter page).
This makes tBERS and tPROG being ~65ms while typical values are at most
a few milliseconds. As these are timeouts, it is not impacting at all
the performances in nominal use.
tR maximum time and tCCS minimum time (delay to wait after a change
column) are set, according to the ONFI specification, to default 'slow'
values; respectively 200us and 500ns.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd/nand/raw/nand_timings.c')
| -rw-r--r-- | drivers/mtd/nand/raw/nand_timings.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/nand_timings.c b/drivers/mtd/nand/raw/nand_timings.c index 7c4e4a371bbc..9bb599106a31 100644 --- a/drivers/mtd/nand/raw/nand_timings.c +++ b/drivers/mtd/nand/raw/nand_timings.c @@ -13,6 +13,8 @@ #include <linux/export.h> #include <linux/mtd/rawnand.h> +#define ONFI_DYN_TIMING_MAX U16_MAX + static const struct nand_data_interface onfi_sdr_timings[] = { /* Mode 0 */ { @@ -303,7 +305,7 @@ int onfi_fill_data_interface(struct nand_chip *chip, /* * Initialize timings that cannot be deduced from timing mode: - * tR, tPROG, tCCS, ... + * tPROG, tBERS, tR and tCCS. * These information are part of the ONFI parameter page. */ if (chip->parameters.onfi.version) { @@ -317,6 +319,22 @@ int onfi_fill_data_interface(struct nand_chip *chip, /* nanoseconds -> picoseconds */ timings->tCCS_min = 1000UL * params->onfi.tCCS; + } else { + struct nand_sdr_timings *timings = &iface->timings.sdr; + /* + * For non-ONFI chips we use the highest possible value for + * tPROG and tBERS. tR and tCCS will take the default values + * precised in the ONFI specification for timing mode 0, + * respectively 200us and 500ns. + */ + + /* microseconds -> picoseconds */ + timings->tPROG_max = 1000000ULL * ONFI_DYN_TIMING_MAX; + timings->tBERS_max = 1000000ULL * ONFI_DYN_TIMING_MAX; + timings->tR_max = 1000000ULL * 200000000ULL; + + /* nanoseconds -> picoseconds */ + timings->tCCS_min = 1000UL * 500000; } return 0; |