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authorMiquel Raynal <miquel.raynal@bootlin.com>2020-09-30 01:01:12 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-11-30 09:27:33 +0100
commit80fe603160a4732a08f0f08f3e3312a3f3a79eee (patch)
tree902b7fe685b9b47224d3983dcb06949b8449b6ba /drivers/mtd/nand/raw/nand_base.c
parentea146d7fbf5081b5eb2777df5e30ed70ca68985b (diff)
downloadlinux-80fe603160a4732a08f0f08f3e3312a3f3a79eee.tar.bz2
mtd: nand: ecc-bch: Stop using raw NAND structures
This code is meant to be reused by the SPI-NAND core. Now that the driver has been cleaned and reorganized, use a generic ECC engine object to store the driver's data instead of accessing members of the nand_chip structure. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-9-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd/nand/raw/nand_base.c')
-rw-r--r--drivers/mtd/nand/raw/nand_base.c38
1 files changed, 33 insertions, 5 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 2ef674c10ac8..03106bf629dd 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5142,8 +5142,33 @@ static void nand_scan_ident_cleanup(struct nand_chip *chip)
int rawnand_sw_bch_init(struct nand_chip *chip)
{
struct nand_device *base = &chip->base;
+ struct nand_ecc_sw_bch_conf *engine_conf;
+ int ret;
+
+ base->ecc.user_conf.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
+ base->ecc.user_conf.algo = NAND_ECC_ALGO_BCH;
+ base->ecc.user_conf.step_size = chip->ecc.size;
+ base->ecc.user_conf.strength = chip->ecc.strength;
+
+ engine_conf = kzalloc(sizeof(*engine_conf), GFP_KERNEL);
+ if (!engine_conf)
+ return -ENOMEM;
+
+ engine_conf->code_size = chip->ecc.bytes;
+
+ base->ecc.ctx.priv = engine_conf;
- return nand_ecc_sw_bch_init(base);
+ ret = nand_ecc_sw_bch_init(base);
+ if (ret)
+ kfree(base->ecc.ctx.priv);
+
+ chip->ecc.size = base->ecc.ctx.conf.step_size;
+ chip->ecc.strength = base->ecc.ctx.conf.strength;
+ chip->ecc.total = base->ecc.ctx.total;
+ chip->ecc.steps = engine_conf->nsteps;
+ chip->ecc.bytes = engine_conf->code_size;
+
+ return ret;
}
EXPORT_SYMBOL(rawnand_sw_bch_init);
@@ -5171,7 +5196,7 @@ void rawnand_sw_bch_cleanup(struct nand_chip *chip)
nand_ecc_sw_bch_cleanup(base);
- chip->ecc.priv = NULL;
+ kfree(base->ecc.ctx.priv);
}
EXPORT_SYMBOL(rawnand_sw_bch_cleanup);
@@ -5794,15 +5819,18 @@ static int nand_scan_tail(struct nand_chip *chip)
* Set the number of read / write steps for one page depending on ECC
* mode.
*/
- ecc->steps = mtd->writesize / ecc->size;
+ if (!ecc->steps)
+ ecc->steps = mtd->writesize / ecc->size;
if (ecc->steps * ecc->size != mtd->writesize) {
WARN(1, "Invalid ECC parameters\n");
ret = -EINVAL;
goto err_nand_manuf_cleanup;
}
- ecc->total = ecc->steps * ecc->bytes;
- chip->base.ecc.ctx.total = ecc->total;
+ if (!ecc->total) {
+ ecc->total = ecc->steps * ecc->bytes;
+ chip->base.ecc.ctx.total = ecc->total;
+ }
if (ecc->total > mtd->oobsize) {
WARN(1, "Total number of ECC bytes exceeded oobsize\n");