diff options
| author | Brian Norris <computersforpeace@gmail.com> | 2014-01-29 14:08:12 -0800 |
|---|---|---|
| committer | Brian Norris <computersforpeace@gmail.com> | 2014-03-10 22:42:22 -0700 |
| commit | 3dad2344e92c6e1aeae42df1c4824f307c51bcc7 (patch) | |
| tree | ca71a7005c582cd98eebf5e16049b125564925f5 /drivers/mtd/nand/nuc900_nand.c | |
| parent | 55e571bd0707fb6516d0e38598c9e51683e03ee9 (diff) | |
| download | linux-3dad2344e92c6e1aeae42df1c4824f307c51bcc7.tar.bz2 | |
mtd: nand: force NAND_CMD_READID onto 8-bit bus
The NAND command helpers tend to automatically shift the column address
for x16 bus devices, since most commands expect a word address, not a
byte address. The Read ID command, however, expects an 8-bit address
(i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or
0x20).
This fixes the column address for a few drivers which imitate the
nand_base defaults. Note that I don't touch sh_flctl.c, since it already
handles this problem slightly differently (note its comment "READID is
always performed using an 8-bit bus").
I have not tested this patch, as I only have x8 parts up for testing at
this point. Hopefully that can change soon...
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-By: Pekon Gupta <pekon@ti.com>
Diffstat (limited to 'drivers/mtd/nand/nuc900_nand.c')
| -rw-r--r-- | drivers/mtd/nand/nuc900_nand.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c index 90c99ea5184a..331fccbdde61 100644 --- a/drivers/mtd/nand/nuc900_nand.c +++ b/drivers/mtd/nand/nuc900_nand.c @@ -151,7 +151,8 @@ static void nuc900_nand_command_lp(struct mtd_info *mtd, unsigned int command, if (column != -1 || page_addr != -1) { if (column != -1) { - if (chip->options & NAND_BUSWIDTH_16) + if (chip->options & NAND_BUSWIDTH_16 && + !nand_opcode_8bits(command)) column >>= 1; write_addr_reg(nand, column); write_addr_reg(nand, column >> 8 | ENDADDR); |