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authorLinus Walleij <linus.walleij@linaro.org>2019-10-21 01:00:42 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2019-10-29 14:24:53 +0100
commit2aba2f2a704d368583e832555b25d88265e62b6d (patch)
treedf3c5d069ce312563550a61032e3f486d22b5fdb /drivers/mtd/maps/Kconfig
parent8b3cc926223be73bb2ab5f9465f157fc27e06eca (diff)
downloadlinux-2aba2f2a704d368583e832555b25d88265e62b6d.tar.bz2
mtd: physmap_of: add a hook for Intel IXP4xx flash probing
In order to support device tree probing of IXP4xx NOR flash chips, a certain big-endian or mixed-endian memory access pattern need to be used. I have opted to use the pattern set by previous plug-ins to physmap for Gemini and Versatile, just override some functions and reuse most of the physmap core code as it is to minimize maintenance. Parts of drivers/mtd/ixp4xx.c are copied into this file. After we have IXP4xx converted fully to device tree, the drivers/mtd/ixp4xx.c file will be deleted and this will be the only access pattern to the IXP4xx flash. I did not keep the quirk in the flash write function after probe, where the old code for a while checks for access to odd addresses, fails and assigns a "faster" write function once it has convinced probe to only use 2-byte accesses. As we mandate that this device should be using bank-width = <2> this should not be a problem unless misconfigured. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd/maps/Kconfig')
-rw-r--r--drivers/mtd/maps/Kconfig11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index bc82305ebb4c..b28225a7c4f3 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -96,6 +96,17 @@ config MTD_PHYSMAP_GEMINI
platforms, some detection and setting up parallel mode on the
external interface.
+config MTD_PHYSMAP_IXP4XX
+ bool "Intel IXP4xx OF-based physical memory map handling"
+ depends on MTD_PHYSMAP_OF
+ depends on ARM
+ select MTD_COMPLEX_MAPPINGS
+ select MTD_CFI_BE_BYTE_SWAP if CPU_BIG_ENDIAN
+ default ARCH_IXP4XX
+ help
+ This provides some extra DT physmap parsing for the Intel IXP4xx
+ platforms, some elaborate endianness handling in particular.
+
config MTD_PHYSMAP_GPIO_ADDR
bool "GPIO-assisted Flash Chip Support"
depends on MTD_PHYSMAP