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authorJerome Brunet <jbrunet@baylibre.com>2017-08-28 16:29:06 +0200
committerUlf Hansson <ulf.hansson@linaro.org>2017-08-30 15:03:47 +0200
commitf89f55df5927a55c107d06ae998a1575ad9d4c9a (patch)
treeef984b4fe9f34eaec588922abc7a812f2edc25c4 /drivers/mmc
parentc36cf1257b391c8b83055df79c8a30c39c69a7b6 (diff)
downloadlinux-f89f55df5927a55c107d06ae998a1575ad9d4c9a.tar.bz2
mmc: meson-gx: rework clk_set function
Clean-up clk_set function to prepare the next changes (DDR and clk-stop) Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/meson-gx-mmc.c30
1 files changed, 9 insertions, 21 deletions
diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c
index 0d29f1f347eb..cd5964aa4f58 100644
--- a/drivers/mmc/host/meson-gx-mmc.c
+++ b/drivers/mmc/host/meson-gx-mmc.c
@@ -139,7 +139,7 @@ struct meson_host {
struct clk *core_clk;
struct clk_mux mux;
struct clk *mux_clk;
- unsigned long current_clock;
+ unsigned long req_rate;
struct clk_divider cfg_div;
struct clk *cfg_div_clk;
@@ -275,29 +275,18 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
int ret;
u32 cfg;
- if (clk_rate) {
- if (WARN_ON(clk_rate > mmc->f_max))
- clk_rate = mmc->f_max;
- else if (WARN_ON(clk_rate < mmc->f_min))
- clk_rate = mmc->f_min;
- }
-
- if (clk_rate == host->current_clock)
+ /* Same request - bail-out */
+ if (host->req_rate == clk_rate)
return 0;
/* stop clock */
cfg = readl(host->regs + SD_EMMC_CFG);
- if (!(cfg & CFG_STOP_CLOCK)) {
- cfg |= CFG_STOP_CLOCK;
- writel(cfg, host->regs + SD_EMMC_CFG);
- }
-
- dev_dbg(host->dev, "change clock rate %u -> %lu\n",
- mmc->actual_clock, clk_rate);
+ cfg |= CFG_STOP_CLOCK;
+ writel(cfg, host->regs + SD_EMMC_CFG);
+ host->req_rate = 0;
if (!clk_rate) {
mmc->actual_clock = 0;
- host->current_clock = 0;
/* return with clock being stopped */
return 0;
}
@@ -309,13 +298,12 @@ static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
return ret;
}
+ host->req_rate = clk_rate;
mmc->actual_clock = clk_get_rate(host->cfg_div_clk);
- host->current_clock = clk_rate;
+ dev_dbg(host->dev, "clk rate: %u Hz\n", mmc->actual_clock);
if (clk_rate != mmc->actual_clock)
- dev_dbg(host->dev,
- "divider requested rate %lu != actual rate %u\n",
- clk_rate, mmc->actual_clock);
+ dev_dbg(host->dev, "requested rate was %lu\n", clk_rate);
/* (re)start clock */
cfg = readl(host->regs + SD_EMMC_CFG);