diff options
| author | Chevron Li <chevron.li@bayhubtech.com> | 2022-07-29 03:05:24 -0700 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2022-09-14 11:53:47 +0200 |
| commit | 50aecccc3e6557b29e7a5d9a28f013fc68ebfb99 (patch) | |
| tree | 2e317259697323a79e6bcbfe3baa7b51a1615717 /drivers/mmc/host/sdhci-pci-o2micro.c | |
| parent | 524836095d91da8e89e3204dd7419a341fea79f9 (diff) | |
| download | linux-50aecccc3e6557b29e7a5d9a28f013fc68ebfb99.tar.bz2 | |
mmc: sdhci-pci-o2micro: fix some SD cards compatibility issue at DDR50 mode
Bayhub chips have better compatibility support for SDR50 than DDR50
and both mode have the same R/W performance when clock frequency >= 100MHz.
Disable DDR50 mode and use SDR50 instead.
Signed-off-by: Chevron Li <chevron.li@bayhubtech.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220729100524.387-1-chevron.li@bayhubtech.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci-pci-o2micro.c')
| -rw-r--r-- | drivers/mmc/host/sdhci-pci-o2micro.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c index 0d4d343dbb77..ad457cd9cbaa 100644 --- a/drivers/mmc/host/sdhci-pci-o2micro.c +++ b/drivers/mmc/host/sdhci-pci-o2micro.c @@ -317,11 +317,12 @@ static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode) u32 reg_val; /* - * This handler only implements the eMMC tuning that is specific to + * This handler implements the hardware tuning that is specific to * this controller. Fall back to the standard method for other TIMING. */ if ((host->timing != MMC_TIMING_MMC_HS200) && - (host->timing != MMC_TIMING_UHS_SDR104)) + (host->timing != MMC_TIMING_UHS_SDR104) && + (host->timing != MMC_TIMING_UHS_SDR50)) return sdhci_execute_tuning(mmc, opcode); if (WARN_ON((opcode != MMC_SEND_TUNING_BLOCK_HS200) && @@ -631,6 +632,8 @@ static int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) if (reg & 0x1) host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; + host->quirks2 |= SDHCI_QUIRK2_BROKEN_DDR50; + sdhci_pci_o2_enable_msi(chip, host); if (chip->pdev->device == PCI_DEVICE_ID_O2_SEABIRD0) { |