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authorOfir Bitton <obitton@habana.ai>2020-12-27 17:09:09 +0200
committerOded Gabbay <ogabbay@kernel.org>2021-01-27 21:03:50 +0200
commitedb07cb69caacb9be06a299cdf62f266292cc890 (patch)
treed7033d53d7fbf6b83f7afaf28ccd8d88426decb2 /drivers/misc/habanalabs/include
parent6769cea8de590920c95603c4f3ce063e38033423 (diff)
downloadlinux-edb07cb69caacb9be06a299cdf62f266292cc890.tar.bz2
habanalabs: read device boot errors after cpucp is up
Boot cpu can report errors in various boot stages. Current implementaion does not take into consideration errors reported in late stages, hence we will check for errors at the most late stage when fetching cpucp information. Signed-off-by: Ofir Bitton <obitton@habana.ai> Reviewed-by: Oded Gabbay <ogabbay@kernel.org> Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/misc/habanalabs/include')
-rw-r--r--drivers/misc/habanalabs/include/common/hl_boot_if.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/include/common/hl_boot_if.h b/drivers/misc/habanalabs/include/common/hl_boot_if.h
index 93552d6b59b3..e29c77bdea07 100644
--- a/drivers/misc/habanalabs/include/common/hl_boot_if.h
+++ b/drivers/misc/habanalabs/include/common/hl_boot_if.h
@@ -69,6 +69,8 @@
* image has failed to match expected
* checksum. Trying to program image again
* might solve this.
+ * CPU_BOOT_ERR0_PLL_FAIL PLL settings failed, meaning that one
+ * of the PLLs remained in REF_CLK
*
* CPU_BOOT_ERR0_ENABLED Error registers enabled.
* This is a main indication that the
@@ -88,6 +90,7 @@
#define CPU_BOOT_ERR0_EFUSE_FAIL (1 << 9)
#define CPU_BOOT_ERR0_PRI_IMG_VER_FAIL (1 << 10)
#define CPU_BOOT_ERR0_SEC_IMG_VER_FAIL (1 << 11)
+#define CPU_BOOT_ERR0_PLL_FAIL (1 << 12)
#define CPU_BOOT_ERR0_ENABLED (1 << 31)
/*