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authorOded Gabbay <oded.gabbay@gmail.com>2019-10-02 14:14:08 +0300
committerOded Gabbay <oded.gabbay@gmail.com>2019-11-21 11:35:45 +0200
commit8fdacf2a530f36f6f0621a95ef0e37d8db2d2f89 (patch)
tree5cb5fd64f80b236a4349c426d7937e6a29cd43d7 /drivers/misc/habanalabs/goya
parentcb596aee8842c87605ea1a9062af2ab435a742d4 (diff)
downloadlinux-8fdacf2a530f36f6f0621a95ef0e37d8db2d2f89.tar.bz2
habanalabs: set TPC Icache to 16 cache lines
Reduce latency to memory during TPC kernel execution. Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com> Reviewed-by: Tomer Tayar <ttayar@habana.ai>
Diffstat (limited to 'drivers/misc/habanalabs/goya')
-rw-r--r--drivers/misc/habanalabs/goya/goya.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/goya/goya.c b/drivers/misc/habanalabs/goya/goya.c
index 0b40915bede2..d49f5ecd903b 100644
--- a/drivers/misc/habanalabs/goya/goya.c
+++ b/drivers/misc/habanalabs/goya/goya.c
@@ -1457,6 +1457,9 @@ static void goya_init_golden_registers(struct hl_device *hdev)
1 << TPC0_NRTR_SCRAMB_EN_VAL_SHIFT);
WREG32(mmTPC0_NRTR_NON_LIN_SCRAMB + offset,
1 << TPC0_NRTR_NON_LIN_SCRAMB_EN_SHIFT);
+
+ WREG32_FIELD(TPC0_CFG_MSS_CONFIG, offset,
+ ICACHE_FETCH_LINE_NUM, 2);
}
WREG32(mmDMA_NRTR_SCRAMB_EN, 1 << DMA_NRTR_SCRAMB_EN_VAL_SHIFT);