diff options
| author | Thierry Reding <treding@nvidia.com> | 2021-06-02 18:32:51 +0200 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-06-03 21:49:40 +0200 |
| commit | 4f1ac76e5ed9436ff3cd72e308527fd1e90b193a (patch) | |
| tree | b088cc04ad067a71bd684ee5bc16b9f3ddb2193b /drivers/memory/tegra/mc.c | |
| parent | eeafcdea46936d84e2016e7d965f0b79e75ffd9e (diff) | |
| download | linux-4f1ac76e5ed9436ff3cd72e308527fd1e90b193a.tar.bz2 | |
memory: tegra: Consolidate register fields
Subsequent patches will add more register fields to the tegra_mc_client
structure, so consolidate all register field definitions into a common
sub-structure for coherency.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20210602163302.120041-2-thierry.reding@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Diffstat (limited to 'drivers/memory/tegra/mc.c')
| -rw-r--r-- | drivers/memory/tegra/mc.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index e58c3e5baea0..b7e104bf6614 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -316,13 +316,13 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc) /* write latency allowance defaults */ for (i = 0; i < mc->soc->num_clients; i++) { - const struct tegra_mc_la *la = &mc->soc->clients[i].la; + const struct tegra_mc_client *client = &mc->soc->clients[i]; u32 value; - value = mc_readl(mc, la->reg); - value &= ~(la->mask << la->shift); - value |= (la->def & la->mask) << la->shift; - mc_writel(mc, value, la->reg); + value = mc_readl(mc, client->regs.la.reg); + value &= ~(client->regs.la.mask << client->regs.la.shift); + value |= (client->regs.la.def & client->regs.la.mask) << client->regs.la.shift; + mc_writel(mc, value, client->regs.la.reg); } /* latch new values */ |