diff options
| author | Yong Wu <yong.wu@mediatek.com> | 2019-08-24 11:02:00 +0800 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2019-08-30 15:57:27 +0200 |
| commit | 2b326d8b1d2b443c3dad96f54c6b279559f87751 (patch) | |
| tree | d4266cd071a34f218584ca8bc9a7e108227cfbaf /drivers/iommu | |
| parent | 50822b0b948fabfc8bcee9a89d031c276b135506 (diff) | |
| download | linux-2b326d8b1d2b443c3dad96f54c6b279559f87751.tar.bz2 | |
iommu/mediatek: Move vld_pa_rng into plat_data
Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
range) register while mt2712 have. Move it into the plat_data.
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu')
| -rw-r--r-- | drivers/iommu/mtk_iommu.c | 3 | ||||
| -rw-r--r-- | drivers/iommu/mtk_iommu.h | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index b43f36aba0a1..eaf6a23f0248 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -567,7 +567,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data) upper_32_bits(data->protect_base); writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR); - if (data->enable_4GB && data->plat_data->m4u_plat != M4U_MT8173) { + if (data->enable_4GB && data->plat_data->has_vld_pa_rng) { /* * If 4GB mode is enabled, the validate PA range is from * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30]. @@ -766,6 +766,7 @@ static const struct mtk_iommu_plat_data mt2712_data = { .m4u_plat = M4U_MT2712, .has_4gb_mode = true, .has_bclk = true, + .has_vld_pa_rng = true, .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}, }; diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h index 8d3b525b8752..973d6e077e43 100644 --- a/drivers/iommu/mtk_iommu.h +++ b/drivers/iommu/mtk_iommu.h @@ -38,6 +38,7 @@ struct mtk_iommu_plat_data { /* HW will use the EMI clock if there isn't the "bclk". */ bool has_bclk; + bool has_vld_pa_rng; bool reset_axi; unsigned char larbid_remap[MTK_LARB_NR_MAX]; }; |