diff options
| author | Robin Murphy <robin.murphy@arm.com> | 2019-08-15 19:37:25 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-08-19 16:52:47 +0100 |
| commit | 620565a76bb31657045a6d4cc37f9df0b4ab5f56 (patch) | |
| tree | dd346a615570665102713412edc81ccd5bf869d7 /drivers/iommu/qcom_iommu.c | |
| parent | 5114e96cb27ed71559f2b674bb3c6ee14eafe9f9 (diff) | |
| download | linux-620565a76bb31657045a6d4cc37f9df0b4ab5f56.tar.bz2 | |
iommu/arm-smmu: Convert context bank registers to bitfields
Finish the final part of the job, once again updating some names to
match the current spec.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/qcom_iommu.c')
| -rw-r--r-- | drivers/iommu/qcom_iommu.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/iommu/qcom_iommu.c b/drivers/iommu/qcom_iommu.c index bed948c3058a..60a125dd7300 100644 --- a/drivers/iommu/qcom_iommu.c +++ b/drivers/iommu/qcom_iommu.c @@ -7,6 +7,7 @@ */ #include <linux/atomic.h> +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/dma-iommu.h> @@ -247,16 +248,16 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, /* TTBRs */ iommu_writeq(ctx, ARM_SMMU_CB_TTBR0, pgtbl_cfg.arm_lpae_s1_cfg.ttbr[0] | - ((u64)ctx->asid << TTBRn_ASID_SHIFT)); + FIELD_PREP(TTBRn_ASID, ctx->asid)); iommu_writeq(ctx, ARM_SMMU_CB_TTBR1, pgtbl_cfg.arm_lpae_s1_cfg.ttbr[1] | - ((u64)ctx->asid << TTBRn_ASID_SHIFT)); + FIELD_PREP(TTBRn_ASID, ctx->asid)); - /* TTBCR */ - iommu_writel(ctx, ARM_SMMU_CB_TTBCR2, + /* TCR */ + iommu_writel(ctx, ARM_SMMU_CB_TCR2, (pgtbl_cfg.arm_lpae_s1_cfg.tcr >> 32) | - TTBCR2_SEP_UPSTREAM); - iommu_writel(ctx, ARM_SMMU_CB_TTBCR, + FIELD_PREP(TCR2_SEP, TCR2_SEP_UPSTREAM)); + iommu_writel(ctx, ARM_SMMU_CB_TCR, pgtbl_cfg.arm_lpae_s1_cfg.tcr); /* MAIRs (stage-1 only) */ |