diff options
| author | Robin Murphy <robin.murphy@arm.com> | 2019-10-25 19:08:36 +0100 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2019-11-04 19:59:30 +0000 |
| commit | 205577ab6f7ade6185f764ed78fb6875dca40205 (patch) | |
| tree | 3dc33876b1194b7d1cf1a384e7216659a6d95344 /drivers/iommu/arm-smmu.c | |
| parent | 5fb190b0b52552de880536d4f409c4300c25e3d4 (diff) | |
| download | linux-205577ab6f7ade6185f764ed78fb6875dca40205.tar.bz2 | |
iommu/io-pgtable-arm: Rationalise MAIR handling
Between VMSAv8-64 and the various 32-bit formats, there is either one
64-bit MAIR or a pair of 32-bit MAIR0/MAIR1 or NMRR/PMRR registers.
As such, keeping two 64-bit values in io_pgtable_cfg has always been
overkill.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/arm-smmu.c')
| -rw-r--r-- | drivers/iommu/arm-smmu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index a180665ea002..424ebf38cd09 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -552,8 +552,8 @@ static void arm_smmu_init_context_bank(struct arm_smmu_domain *smmu_domain, cb->mair[0] = pgtbl_cfg->arm_v7s_cfg.prrr; cb->mair[1] = pgtbl_cfg->arm_v7s_cfg.nmrr; } else { - cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair[0]; - cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair[1]; + cb->mair[0] = pgtbl_cfg->arm_lpae_s1_cfg.mair; + cb->mair[1] = pgtbl_cfg->arm_lpae_s1_cfg.mair >> 32; } } } |