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authorMichael J. Ruhl <michael.j.ruhl@intel.com>2018-08-15 23:04:04 -0700
committerDoug Ledford <dledford@redhat.com>2018-09-01 08:13:38 -0400
commit6eb4eb10fb0d14340956c05281b7e09d80902788 (patch)
tree87369fd62f0ca8695b8839b5b3989375b6d87854 /drivers/infiniband/hw/hfi1/hfi.h
parent09e71899b9cf5ed7495118b3023db41575013fe2 (diff)
downloadlinux-6eb4eb10fb0d14340956c05281b7e09d80902788.tar.bz2
IB/hfi1: Make the MSIx resource allocation a bit more flexible
The current method of allocating MSIx resources is a bit cumbersome, and not very easily added to. Refactor and re-order the code paths into a more consistent interface. Update the interface so that allocations are not order dependent. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Reviewed-by: Sadanand Warrier <sadanand.warrier@intel.com> Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
Diffstat (limited to 'drivers/infiniband/hw/hfi1/hfi.h')
-rw-r--r--drivers/infiniband/hw/hfi1/hfi.h13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/infiniband/hw/hfi1/hfi.h b/drivers/infiniband/hw/hfi1/hfi.h
index 6c5f2c2b7e7e..e2a5c2dac109 100644
--- a/drivers/infiniband/hw/hfi1/hfi.h
+++ b/drivers/infiniband/hw/hfi1/hfi.h
@@ -668,6 +668,14 @@ struct hfi1_msix_entry {
struct irq_affinity_notify notify;
};
+struct hfi1_msix_info {
+ /* lock to synchronize in_use_msix access */
+ spinlock_t msix_lock;
+ DECLARE_BITMAP(in_use_msix, CCE_NUM_MSIX_VECTORS);
+ struct hfi1_msix_entry *msix_entries;
+ u16 max_requested;
+};
+
/* per-SL CCA information */
struct cca_timer {
struct hrtimer hrtimer;
@@ -993,7 +1001,6 @@ struct hfi1_vnic_data {
struct idr vesw_idr;
u8 rmt_start;
u8 num_ctxt;
- u32 msix_idx;
};
struct hfi1_vnic_vport_info;
@@ -1207,9 +1214,7 @@ struct hfi1_devdata {
struct diag_client *diag_client;
/* MSI-X information */
- struct hfi1_msix_entry *msix_entries;
- u32 num_msix_entries;
- u32 first_dyn_msix_idx;
+ struct hfi1_msix_info msix_info;
/* general interrupt: mask of handled interrupts */
u64 gi_mask[CCE_NUM_INT_CSRS];