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authorBeniamin Bia <beniamin.bia@analog.com>2019-04-02 16:18:40 +0300
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2019-04-14 13:22:29 +0100
commit7989b4bb23fe489996de7ad97b9327e804d7c158 (patch)
treea7fb0fccddcfa7f6407512d44ef7f6dcad2550bf /drivers/iio/adc/ad7606.h
parent6bf229abce7528bcf70c62d913eeabfc770ee72c (diff)
downloadlinux-7989b4bb23fe489996de7ad97b9327e804d7c158.tar.bz2
iio: adc: ad7616: Add support for AD7616 ADC
The AD7616 is a 12-bit ADC with 16 channels. The AD7616 can be configured to work in hardware mode by controlling it via gpio pins and read data via spi. No support for software mode yet, but it is a work in progress. This device requires a reset in order to update oversampling, so chip info has got a new attribute to mark this. The current assumption that this driver makes for AD7616, is that it's working in Hardware Mode with Serial, Burst and Sequencer modes activated. To activate them, following pins must be pulled high: -SER/PAR -SEQEN And following must be pulled low: -WR/BURST -DB4/SEQEN Datasheets: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/ad7616.pdf Signed-off-by: Beniamin Bia <beniamin.bia@analog.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc/ad7606.h')
-rw-r--r--drivers/iio/adc/ad7606.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h
index 8c91bd427c4e..f9ef52131e74 100644
--- a/drivers/iio/adc/ad7606.h
+++ b/drivers/iio/adc/ad7606.h
@@ -15,12 +15,14 @@
* @oversampling_avail pointer to the array which stores the available
* oversampling ratios.
* @oversampling_num number of elements stored in oversampling_avail array
+ * @os_req_reset some devices require a reset to update oversampling
*/
struct ad7606_chip_info {
const struct iio_chan_spec *channels;
unsigned int num_channels;
const unsigned int *oversampling_avail;
unsigned int oversampling_num;
+ bool os_req_reset;
};
/**
@@ -76,9 +78,9 @@ struct ad7606_state {
/*
* DMA (thus cache coherency maintenance) requires the
* transfer buffers to live in their own cache lines.
- * 8 * 16-bit samples + 64-bit timestamp
+ * 16 * 16-bit samples + 64-bit timestamp
*/
- unsigned short data[12] ____cacheline_aligned;
+ unsigned short data[20] ____cacheline_aligned;
};
/**
@@ -98,7 +100,8 @@ enum ad7606_supported_device_ids {
ID_AD7605_4,
ID_AD7606_8,
ID_AD7606_6,
- ID_AD7606_4
+ ID_AD7606_4,
+ ID_AD7616,
};
#ifdef CONFIG_PM_SLEEP