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authorJake Wang <haonan.wang2@amd.com>2020-12-11 16:53:57 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-12-23 15:02:47 -0500
commit4aa9d658d21cf192fa12227591526d06fec114e0 (patch)
tree78182e9a20c30361f41122ae03d6222e9553fadb /drivers/i3c
parentc277925cca8c534ddcf1fb0ec9b9e4ca35b1d064 (diff)
downloadlinux-4aa9d658d21cf192fa12227591526d06fec114e0.tar.bz2
drm/amd/display: always program DPPDTO unless not safe to lower
[Why] We defer clock updates to after pipes have been programmed. In some instances we use DPPCLK that have been previously set to be "unused". This results in a brief window of time where underflow could occur. [How] During prepare bandwidth allow rn_update_clocks_update_dpp_dto to check each instance and compare previous clock to new clock. If new clock is higher than previous clock, program DPPDTO. Signed-off-by: Jake Wang <haonan.wang2@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/i3c')
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