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| author | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2019-05-03 11:44:36 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-05-03 18:14:29 +0200 |
| commit | db73a059de00eed721f13051c0d6ff3e7de90fe8 (patch) | |
| tree | 3a6af1f759b2b2c1c4fa9cf4c19fcf5ef74b4761 /drivers/hwtracing/intel_th/pci.c | |
| parent | 85d49eb130ad747abebb9b0ff151f8afa7733115 (diff) | |
| download | linux-db73a059de00eed721f13051c0d6ff3e7de90fe8.tar.bz2 | |
intel_th: Rework resource passing between glue layers and core
Currently, MMIO resource numbers in the TH driver core correspond to
PCI BAR numbers, because in the beginning there was only the PCI glue
layer. This created some confusion when the ACPI glue layer was added.
To avoid confusion and remove glue-specific code from the driver core,
split the resource indices between core and glue layers and change the
API so that the driver core receives the MMIO resources in the same
fixed order. At the same time, make the IRQ always be a parameter to
intel_th_alloc() instead of sometimes passing it as a resource.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hwtracing/intel_th/pci.c')
| -rw-r--r-- | drivers/hwtracing/intel_th/pci.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/hwtracing/intel_th/pci.c b/drivers/hwtracing/intel_th/pci.c index 1cf6290d6435..9dd2d75bd539 100644 --- a/drivers/hwtracing/intel_th/pci.c +++ b/drivers/hwtracing/intel_th/pci.c @@ -17,7 +17,12 @@ #define DRIVER_NAME "intel_th_pci" -#define BAR_MASK (BIT(TH_MMIO_CONFIG) | BIT(TH_MMIO_SW)) +enum { + TH_PCI_CONFIG_BAR = 0, + TH_PCI_STH_SW_BAR = 2, +}; + +#define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR)) #define PCI_REG_NPKDSC 0x80 #define NPKDSC_TSACT BIT(5) @@ -66,6 +71,10 @@ static int intel_th_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct intel_th_drvdata *drvdata = (void *)id->driver_data; + struct resource resource[TH_MMIO_END] = { + [TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR], + [TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR], + }; struct intel_th *th; int err; @@ -77,8 +86,8 @@ static int intel_th_pci_probe(struct pci_dev *pdev, if (err) return err; - th = intel_th_alloc(&pdev->dev, drvdata, pdev->resource, - DEVICE_COUNT_RESOURCE, pdev->irq); + th = intel_th_alloc(&pdev->dev, drvdata, resource, TH_MMIO_END, + pdev->irq); if (IS_ERR(th)) return PTR_ERR(th); |