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author | Clément Lassieur <clement@lassieur.org> | 2021-06-03 17:59:21 +0200 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-06-09 11:25:07 +0200 |
commit | aafe93516b8567ab5864e1f4cd3eeabc54fb0e5a (patch) | |
tree | c58408cca36b3ce7159f6522fc680d539467fdf2 /drivers/hid/hid-a4tech.c | |
parent | ecfbd7b9054bddb12cea07fda41bb3a79a7b0149 (diff) | |
download | linux-aafe93516b8567ab5864e1f4cd3eeabc54fb0e5a.tar.bz2 |
usb: dwc2: Don't reset the core after setting turnaround time
Every time the hub signals a reset while we (device) are hsotg->connected,
dwc2_hsotg_core_init_disconnected() is called, which in turn calls
dwc2_hs_phy_init().
GUSBCFG.USBTrdTim is cleared upon Core Soft Reset, so if
hsotg->params.phy_utmi_width is 8-bit, the value of GUSBCFG.USBTrdTim (the
default one: 0x5, corresponding to 16-bit) is always different from
hsotg->params.phy_utmi_width, thus dwc2_core_reset() is called every
time (usbcfg != usbcfg_old), which causes 2 issues:
1) The call to dwc2_core_reset() does another reset 300us after the initial
Chirp K of the first reset (which should last at least Tuch = 1ms), and
messes up the High-speed Detection Handshake: both hub and device drive
current into the D+ and D- lines at the same time.
2) GUSBCFG.USBTrdTim is cleared by the second reset, so its value is always
the default one (0x5).
Setting GUSBCFG.USBTrdTim after the potential call to dwc2_core_reset()
fixes both issues. It is now set even when select_phy is false because the
cost of the Core Soft Reset is removed.
Fixes: 1e868545f2bb ("usb: dwc2: gadget: Move gadget phy init into core phy init")
Signed-off-by: Clément Lassieur <clement@lassieur.org>
Link: https://lore.kernel.org/r/20210603155921.940651-1-clement@lassieur.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/hid/hid-a4tech.c')
0 files changed, 0 insertions, 0 deletions