diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2020-06-21 12:35:48 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2020-07-24 18:51:03 +1000 |
commit | f801efb127ad02e2cc6ddb1bf1e30bfe001fb4fe (patch) | |
tree | 9dd55838cd932957d9ad8382dce1902844c384d1 /drivers/gpu | |
parent | 35cefc538be76348dcd04378cef626b7c76f156e (diff) | |
download | linux-f801efb127ad02e2cc6ddb1bf1e30bfe001fb4fe.tar.bz2 |
drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_dither()
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head507d.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head907d.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/head917d.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/dispnv50/headc37d.c | 9 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_connector.h | 25 |
6 files changed, 42 insertions, 22 deletions
diff --git a/drivers/gpu/drm/nouveau/dispnv50/head.c b/drivers/gpu/drm/nouveau/dispnv50/head.c index 2d84eafd7b3e..841edfaf5b9d 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c @@ -106,9 +106,9 @@ nv50_head_atomic_check_dither(struct nv50_head_atom *armh, } } - asyh->dither.enable = mode; - asyh->dither.bits = mode >> 1; - asyh->dither.mode = mode >> 3; + asyh->dither.enable = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, ENABLE); + asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS); + asyh->dither.mode = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, MODE); asyh->set.dither = true; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/head507d.c b/drivers/gpu/drm/nouveau/dispnv50/head507d.c index ed54c6548e1c..be9b9fa27dd0 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head507d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head507d.c @@ -51,9 +51,11 @@ head507d_dither(struct nv50_head *head, struct nv50_head_atom *asyh) if ((ret = PUSH_WAIT(push, 2))) return ret; - PUSH_NVSQ(push, NV507D, 0x08a0 + (i * 0x400), asyh->dither.mode << 3 | - asyh->dither.bits << 1 | - asyh->dither.enable); + PUSH_MTHD(push, NV507D, HEAD_SET_DITHER_CONTROL(i), + NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | + NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | + NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | + NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/head907d.c b/drivers/gpu/drm/nouveau/dispnv50/head907d.c index 44b9693cebec..f595cc7c514b 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head907d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head907d.c @@ -78,9 +78,11 @@ head907d_dither(struct nv50_head *head, struct nv50_head_atom *asyh) if ((ret = PUSH_WAIT(push, 2))) return ret; - PUSH_NVSQ(push, NV907D, 0x0490 + (i * 0x300), asyh->dither.mode << 3 | - asyh->dither.bits << 1 | - asyh->dither.enable); + PUSH_MTHD(push, NV907D, HEAD_SET_DITHER_CONTROL(i), + NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | + NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | + NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | + NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/head917d.c b/drivers/gpu/drm/nouveau/dispnv50/head917d.c index 026cfb44d597..a5d827403660 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/head917d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/head917d.c @@ -36,9 +36,11 @@ head917d_dither(struct nv50_head *head, struct nv50_head_atom *asyh) if ((ret = PUSH_WAIT(push, 2))) return ret; - PUSH_NVSQ(push, NV917D, 0x04a0 + (i * 0x300), asyh->dither.mode << 3 | - asyh->dither.bits << 1 | - asyh->dither.enable); + PUSH_MTHD(push, NV917D, HEAD_SET_DITHER_CONTROL(i), + NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | + NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | + NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | + NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); return 0; } diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c index 48b8b4dbd693..172773b6f41b 100644 --- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c +++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c @@ -85,9 +85,12 @@ headc37d_dither(struct nv50_head *head, struct nv50_head_atom *asyh) if ((ret = PUSH_WAIT(push, 2))) return ret; - PUSH_NVSQ(push, NV907D, 0x2018 + (i * 0x400), asyh->dither.mode << 8 | - asyh->dither.bits << 4 | - asyh->dither.enable); + PUSH_MTHD(push, NVC37D, HEAD_SET_DITHER_CONTROL(i), + NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | + NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | + NVDEF(NVC37D, HEAD_SET_DITHER_CONTROL, OFFSET_ENABLE, DISABLE) | + NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | + NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, PHASE, 0)); return 0; } diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h b/drivers/gpu/drm/nouveau/nouveau_connector.h index 9e062c7adec8..d6de5cb8e223 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.h +++ b/drivers/gpu/drm/nouveau/nouveau_connector.h @@ -29,6 +29,10 @@ #include <nvif/notify.h> +#include <nvhw/class/cl507d.h> +#include <nvhw/class/cl907d.h> +#include <nvhw/drf.h> + #include <drm/drm_crtc.h> #include <drm/drm_edid.h> #include <drm/drm_encoder.h> @@ -56,16 +60,23 @@ struct nouveau_conn_atom { * hw values, and the code relies on this. */ enum { - DITHERING_MODE_OFF = 0x00, - DITHERING_MODE_ON = 0x01, - DITHERING_MODE_DYNAMIC2X2 = 0x10 | DITHERING_MODE_ON, - DITHERING_MODE_STATIC2X2 = 0x18 | DITHERING_MODE_ON, - DITHERING_MODE_TEMPORAL = 0x20 | DITHERING_MODE_ON, + DITHERING_MODE_OFF = + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, DISABLE), + DITHERING_MODE_ON = + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, ENABLE), + DITHERING_MODE_DYNAMIC2X2 = DITHERING_MODE_ON | + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, DYNAMIC_2X2), + DITHERING_MODE_STATIC2X2 = DITHERING_MODE_ON | + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, MODE, STATIC_2X2), + DITHERING_MODE_TEMPORAL = DITHERING_MODE_ON | + NVDEF(NV907D, HEAD_SET_DITHER_CONTROL, MODE, TEMPORAL), DITHERING_MODE_AUTO } mode; enum { - DITHERING_DEPTH_6BPC = 0x00, - DITHERING_DEPTH_8BPC = 0x02, + DITHERING_DEPTH_6BPC = + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_6_BITS), + DITHERING_DEPTH_8BPC = + NVDEF(NV507D, HEAD_SET_DITHER_CONTROL, BITS, DITHER_TO_8_BITS), DITHERING_DEPTH_AUTO } depth; } dither; |