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| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2019-01-31 17:08:43 -0800 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2019-02-01 08:39:52 +0000 |
| commit | ae598b0d6b50f5da3d31dc1fab9880b03c631b70 (patch) | |
| tree | ec9316ee3b908c81ec60901713a6116350cb95fc /drivers/gpu | |
| parent | 69b768f2bc6750f785bcf04f87b06e8c27e22de9 (diff) | |
| download | linux-ae598b0d6b50f5da3d31dc1fab9880b03c631b70.tar.bz2 | |
drm/i915: Save some lines of source code in workarounds
No functional or code size change - just notice we can compact the source
by re-using a single helper for adding workarounds.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/1548983324-15344-3-git-send-email-talha.nassar@intel.com
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_workarounds.c | 32 |
1 files changed, 6 insertions, 26 deletions
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c index 584c4a5d2674..5c010551cd23 100644 --- a/drivers/gpu/drm/i915/intel_workarounds.c +++ b/drivers/gpu/drm/i915/intel_workarounds.c @@ -142,7 +142,8 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa) } static void -__wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, u32 val) +wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) { struct i915_wa wa = { .reg = reg, @@ -156,26 +157,7 @@ __wa_add(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, u32 val) static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { - struct i915_wa wa = { - .reg = reg, - .mask = val, - .val = _MASKED_BIT_ENABLE(val) - }; - - _wa_add(wal, &wa); -} - -static void -wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, - u32 val) -{ - struct i915_wa wa = { - .reg = reg, - .mask = mask, - .val = val - }; - - _wa_add(wal, &wa); + wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val)); } static void @@ -190,16 +172,14 @@ wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val) wa_write_masked_or(wal, reg, val, val); } -#define WA_REG(addr, mask, val) __wa_add(wal, (addr), (mask), (val)) - #define WA_SET_BIT_MASKED(addr, mask) \ - WA_REG(addr, (mask), _MASKED_BIT_ENABLE(mask)) + wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_ENABLE(mask)) #define WA_CLR_BIT_MASKED(addr, mask) \ - WA_REG(addr, (mask), _MASKED_BIT_DISABLE(mask)) + wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask)) #define WA_SET_FIELD_MASKED(addr, mask, value) \ - WA_REG(addr, (mask), _MASKED_FIELD(mask, value)) + wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value))) static void gen8_ctx_workarounds_init(struct intel_engine_cs *engine) { |