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author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2021-04-14 16:48:12 +0800 |
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committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2021-04-16 13:41:41 +0800 |
commit | 6b5b2a5bcfe9a250da19bac4ef7cabdc81d154ec (patch) | |
tree | aeccead4329bf20693105a5054efc898af10c360 /drivers/gpu | |
parent | b6a37a93c9ac3900987c79b726d0bb3699d8db4e (diff) | |
download | linux-6b5b2a5bcfe9a250da19bac4ef7cabdc81d154ec.tar.bz2 |
drm/i915/gvt: Fix BDW command parser regression
On BDW new Windows driver has brought extra registers to handle for
LRM/LRR command in WA ctx. Add allowed registers in cmd parser for BDW.
Cc: Alex Williamson <alex.williamson@redhat.com>
Cc: Yan Zhao <yan.y.zhao@intel.com>
Cc: stable@vger.kernel.org
Tested-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Colin Xu <colin.xu@intel.com>
Fixes: 73a37a43d1b0 ("drm/i915/gvt: filter cmds "lrr-src" and "lrr-dst" in cmd_handler")
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20210414084813.3763353-1-zhenyuw@linux.intel.com
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/gvt/cmd_parser.c | 19 |
1 files changed, 13 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c index fef1e857cefc..01c1d1b36acd 100644 --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c @@ -916,19 +916,26 @@ static int cmd_reg_handler(struct parser_exec_state *s, if (!strncmp(cmd, "srm", 3) || !strncmp(cmd, "lrm", 3)) { - if (offset != i915_mmio_reg_offset(GEN8_L3SQCREG4) && - offset != 0x21f0) { + if (offset == i915_mmio_reg_offset(GEN8_L3SQCREG4) || + offset == 0x21f0 || + (IS_BROADWELL(gvt->gt->i915) && + offset == i915_mmio_reg_offset(INSTPM))) + return 0; + else { gvt_vgpu_err("%s access to register (%x)\n", cmd, offset); return -EPERM; - } else - return 0; + } } if (!strncmp(cmd, "lrr-src", 7) || !strncmp(cmd, "lrr-dst", 7)) { - gvt_vgpu_err("not allowed cmd %s\n", cmd); - return -EPERM; + if (IS_BROADWELL(gvt->gt->i915) && offset == 0x215c) + return 0; + else { + gvt_vgpu_err("not allowed cmd %s reg (%x)\n", cmd, offset); + return -EPERM; + } } if (!strncmp(cmd, "pipe_ctrl", 9)) { |