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authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>2017-07-07 11:24:13 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 18:08:46 -0400
commit4e5095ca06a00fda50e2fcc721b1f923478778a8 (patch)
treea35ec41209ce1c97e24833cefd357593f6b0044d /drivers/gpu
parent7dbeaae2a554c479120836bb02a97d602e5ad4a3 (diff)
downloadlinux-4e5095ca06a00fda50e2fcc721b1f923478778a8.tar.bz2
drm/amd/display: dal1.1 hwseq prog update
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 223bb79bc8b8..4c39bf052d08 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -64,17 +64,13 @@ static void enable_dppclk(
plane_id,
dppclk_div);
- if (dppclk_div) {
- /* 1/2 DISPCLK*/
+ if (hws->shifts->DPPCLK_RATE_CONTROL)
REG_UPDATE_2(DPP_CONTROL[plane_id],
- DPPCLK_RATE_CONTROL, 1,
+ DPPCLK_RATE_CONTROL, dppclk_div,
DPP_CLOCK_ENABLE, 1);
- } else {
- /* DISPCLK */
- REG_UPDATE_2(DPP_CONTROL[plane_id],
- DPPCLK_RATE_CONTROL, 0,
+ else
+ REG_UPDATE(DPP_CONTROL[plane_id],
DPP_CLOCK_ENABLE, 1);
- }
}
static void enable_power_gating_plane(