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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-04 22:22:14 +0200 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2019-02-05 21:57:58 +0200 |
commit | 108d14bdaef67617412af3f40256810281464425 (patch) | |
tree | f4357482440674ea0e820291d03fbb70143413e4 /drivers/gpu | |
parent | d16221195ae255beae1fa62f961a9b8e020a6c22 (diff) | |
download | linux-108d14bdaef67617412af3f40256810281464425.tar.bz2 |
drm/i915: Setup PIPE_CHICKEN for fastsets too
Configure PIPE_CHICKEN during intel_update_pipe_config() to make
sure we have our chickens in a row with fastboot too.
v2: Apparently PIPE_CHICKEN is icl+ only
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190204202214.27051-1-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index af848fb72ed6..dc7a2aa62874 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3958,6 +3958,9 @@ static void intel_update_pipe_config(const struct intel_crtc_state *old_crtc_sta I915_WRITE(SKL_BOTTOM_COLOR(crtc->pipe), SKL_BOTTOM_COLOR_GAMMA_ENABLE | SKL_BOTTOM_COLOR_CSC_ENABLE); + + if (INTEL_GEN(dev_priv) >= 11) + icl_set_pipe_chicken(crtc); } static void intel_fdi_normal_train(struct intel_crtc *crtc) |