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| author | Thierry Reding <treding@nvidia.com> | 2018-11-29 17:24:34 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-11-29 17:25:21 +0100 |
| commit | 0cffbde2e318cc1214486a84be0f31045b1fa493 (patch) | |
| tree | 2ad8dab4cc1f4a2849c5da84a56e8f256debb862 /drivers/gpu/vga | |
| parent | d6b9bc025859521dae719d8fb8278b0c39b34861 (diff) | |
| download | linux-0cffbde2e318cc1214486a84be0f31045b1fa493.tar.bz2 | |
drm/tegra: hub: Enable all required clocks
The display architecture on Tegra186 and Tegra194 requires that there be
some valid clock on all domains before accessing any display register. A
further requirement is that in addition to the host1x, hub, disp and dsc
clocks, all the head clocks (pclk0-2 on Tegra186 or pclk0-3 on Tegra194)
must also be enabled.
Implement this logic within the display hub driver to ensure the clocks
are always enabled at the right time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/vga')
0 files changed, 0 insertions, 0 deletions