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authorVille Syrjälä <ville.syrjala@linux.intel.com>2020-10-21 16:14:41 +0300
committerVille Syrjälä <ville.syrjala@linux.intel.com>2020-10-21 23:20:19 +0300
commitd08c4e2327428d93f6d80ab0e7a79679f4c32906 (patch)
tree7b4819819cacbf6f7f47b2f7b079119cd90a8e1f /drivers/gpu/drm
parente82351e74dcfc76c0f4241b5dbf8ee7c0ceb22be (diff)
downloadlinux-d08c4e2327428d93f6d80ab0e7a79679f4c32906.tar.bz2
drm/i915: Fix potential overflows in ilk ips calculations
A bunch of the ips calculations require 64bit math. In particular 'corr' and 'corr2' look like they can overflow on 32bit systems. Switch to explicit u64 for those. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201021131443.25616-3-ville.syrjala@linux.intel.com Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/gt/intel_rps.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index e2d7ef5f6dc9..0db565d2be9a 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -1281,8 +1281,9 @@ static unsigned long __ips_gfx_val(struct intel_ips *ips)
{
struct intel_rps *rps = container_of(ips, typeof(*rps), ips);
struct intel_uncore *uncore = rps_to_uncore(rps);
- unsigned long t, corr, state1, corr2, state2;
+ unsigned int t, state1, state2;
u32 pxvid, ext_v;
+ u64 corr, corr2;
lockdep_assert_held(&mchdev_lock);
@@ -1303,11 +1304,10 @@ static unsigned long __ips_gfx_val(struct intel_ips *ips)
else /* < 50 */
corr = t * 301 + 1004;
- corr = corr * 150142 * state1 / 10000 - 78642;
- corr /= 100000;
- corr2 = corr * ips->corr;
+ corr = div_u64(corr * 150142 * state1, 10000) - 78642;
+ corr2 = div_u64(corr, 100000) * ips->corr;
- state2 = corr2 * state1 / 10000;
+ state2 = div_u64(corr2 * state1, 10000);
state2 /= 100; /* convert to mW */
__gen5_ips_update(ips);