diff options
| author | Xiaojie Yuan <xiaojie.yuan@amd.com> | 2019-05-16 18:05:37 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-08-02 10:30:40 -0500 |
| commit | 4a0e815fb3180875f8763321e5d2e2b432d35f1a (patch) | |
| tree | 8d402ae8720c0fbc1665c49547472ac3af37b462 /drivers/gpu/drm | |
| parent | f2d6731d77cfbcdac9724e249cebdce0a75a2d00 (diff) | |
| download | linux-4a0e815fb3180875f8763321e5d2e2b432d35f1a.tar.bz2 | |
drm/amdgpu/gmc10: set gart size and vm size for navi12
Same as other navi asics.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c index 0fd85cb15322..f585fc92871b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c @@ -525,6 +525,7 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_NAVI10: case CHIP_NAVI14: + case CHIP_NAVI12: default: adev->gmc.gart_size = 512ULL << 20; break; @@ -603,10 +604,11 @@ static int gmc_v10_0_sw_init(void *handle) switch (adev->asic_type) { case CHIP_NAVI10: case CHIP_NAVI14: + case CHIP_NAVI12: adev->num_vmhubs = 2; /* * To fulfill 4-level page support, - * vm size is 256TB (48bit), maximum size of Navi10/Navi14, + * vm size is 256TB (48bit), maximum size of Navi10/Navi14/Navi12, * block size 512 (9bit) */ amdgpu_vm_adjust_size(adev, 256 * 1024, 9, 3, 48); @@ -721,6 +723,7 @@ static void gmc_v10_0_init_golden_registers(struct amdgpu_device *adev) switch (adev->asic_type) { case CHIP_NAVI10: case CHIP_NAVI14: + case CHIP_NAVI12: break; default: break; |